arm: improve tests and fix vrmlaldavhaq*
authorAndrea Corallo <andrea.corallo@arm.com>
Wed, 16 Nov 2022 13:44:57 +0000 (14:44 +0100)
committerAndrea Corallo <andrea.corallo@arm.com>
Mon, 28 Nov 2022 09:09:22 +0000 (10:09 +0100)
gcc/ChangeLog:

* config/arm/mve.md (mve_vrmlaldavhq_<supf>v4si,
mve_vrmlaldavhaq_<supf>v4si): Fix spacing vs tabs.

gcc/testsuite/ChangeLog:

* gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_s32.c: Improve test.
* gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_u32.c: Likewise.

gcc/config/arm/mve.md
gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_s32.c
gcc/testsuite/gcc.target/arm/mve/intrinsics/vrmlaldavhaq_p_u32.c

index d2ffae6..b5e6da4 100644 (file)
         VRMLALDAVHQ))
   ]
   "TARGET_HAVE_MVE"
-  "vrmlaldavh.<supf>32 %Q0, %R0, %q1, %q2"
+  "vrmlaldavh.<supf>32\t%Q0, %R0, %q1, %q2"
   [(set_attr "type" "mve_move")
 ])
 
         VRMLALDAVHAQ))
   ]
   "TARGET_HAVE_MVE"
-  "vrmlaldavha.<supf>32 %Q0, %R0, %q2, %q3"
+  "vrmlaldavha.<supf>32\t%Q0, %R0, %q2, %q3"
   [(set_attr "type" "mve_move")
 ])
 
index 263d350..dec4a96 100644 (file)
@@ -1,21 +1,41 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vrmlaldavhat.s32        (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:       @.*|)
+**     ...
+*/
 int64_t
 foo (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
 {
   return vrmlaldavhaq_p_s32 (a, b, c, p);
 }
 
-/* { dg-final { scan-assembler "vrmlaldavhat.s32"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vrmlaldavhat.s32        (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:       @.*|)
+**     ...
+*/
 int64_t
 foo1 (int64_t a, int32x4_t b, int32x4_t c, mve_pred16_t p)
 {
   return vrmlaldavhaq_p (a, b, c, p);
 }
 
-/* { dg-final { scan-assembler "vrmlaldavhat.s32"  }  } */
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file
index 83ab68c..f3c8bfd 100644 (file)
@@ -1,21 +1,57 @@
 /* { dg-require-effective-target arm_v8_1m_mve_ok } */
 /* { dg-add-options arm_v8_1m_mve } */
 /* { dg-additional-options "-O2" } */
+/* { dg-final { check-function-bodies "**" "" } } */
 
 #include "arm_mve.h"
 
+/*
+**foo:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vrmlaldavhat.u32        (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:       @.*|)
+**     ...
+*/
 uint64_t
 foo (uint64_t a, uint32x4_t b, uint32x4_t c, mve_pred16_t p)
 {
   return vrmlaldavhaq_p_u32 (a, b, c, p);
 }
 
-/* { dg-final { scan-assembler "vrmlaldavhat.u32"  }  } */
 
+/*
+**foo1:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vrmlaldavhat.u32        (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:       @.*|)
+**     ...
+*/
 uint64_t
 foo1 (uint64_t a, uint32x4_t b, uint32x4_t c, mve_pred16_t p)
 {
   return vrmlaldavhaq_p (a, b, c, p);
 }
 
-/* { dg-final { scan-assembler "vrmlaldavhat.u32"  }  } */
+/*
+**foo2:
+**     ...
+**     vmsr    p0, (?:ip|fp|r[0-9]+)(?:        @.*|)
+**     ...
+**     vpst(?: @.*|)
+**     ...
+**     vrmlaldavhat.u32        (?:ip|fp|r[0-9]+), (?:ip|fp|r[0-9]+), q[0-9]+, q[0-9]+(?:       @.*|)
+**     ...
+*/
+uint64_t
+foo2 (uint32x4_t b, uint32x4_t c, mve_pred16_t p)
+{
+  return vrmlaldavhaq_p (1, b, c, p);
+}
+
+/* { dg-final { scan-assembler-not "__ARM_undef" } } */
\ No newline at end of file