staging: vme_user: add space around operators

Add a space before and after the operator, for readability.

Reported by checkpatch script:

" CHECK: spaces preferred around that '+', '<<' and '>>' ".

Signed-off-by: Menna Mahmoud <eng.mennamahmoud.mm@gmail.com>
Link: https://lore.kernel.org/r/57006c151d4d95550b987143a6650f8b3594ddea.1678899549.git.eng.mennamahmoud.mm@gmail.com
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/drivers/staging/vme_user/vme_tsi148.c b/drivers/staging/vme_user/vme_tsi148.c
index 482049c..bfa6040 100644 (file)
--- a/drivers/staging/vme_user/vme_tsi148.c
+++ b/drivers/staging/vme_user/vme_tsi148.c
@@ -737,7 +737,7 @@ static int tsi148_alloc_resource(struct vme_master_resource *image,
                return 0;
 
        if (!image->bus_resource.name) {
-               image->bus_resource.name = kmalloc(VMENAMSIZ+3, GFP_ATOMIC);
+               image->bus_resource.name = kmalloc(VMENAMSIZ + 3, GFP_ATOMIC);
                if (!image->bus_resource.name) {
                        retval = -ENOMEM;
                        goto err_name;
@@ -983,7 +983,7 @@ static int tsi148_master_set(struct vme_master_resource *image, int enabled,
                goto err_aspace;
        }
 
-       temp_ctl &= ~(3<<4);
+       temp_ctl &= ~(3 << 4);
        if (cycle & VME_SUPER)
                temp_ctl |= TSI148_LCSR_OTAT_SUP;
        if (cycle & VME_PROG)
@@ -2187,14 +2187,14 @@ static int tsi148_crcsr_init(struct vme_bridge *tsi148_bridge,
 
        /* Ensure that the CR/CSR is configured at the correct offset */
        cbar = ioread32be(bridge->base + TSI148_CBAR);
-       cbar = (cbar & TSI148_CRCSR_CBAR_M)>>3;
+       cbar = (cbar & TSI148_CRCSR_CBAR_M) >> 3;
 
        vstat = tsi148_slot_get(tsi148_bridge);
 
        if (cbar != vstat) {
                cbar = vstat;
                dev_info(tsi148_bridge->parent, "Setting CR/CSR offset\n");
-               iowrite32be(cbar<<3, bridge->base + TSI148_CBAR);
+               iowrite32be(cbar << 3, bridge->base + TSI148_CBAR);
        }
        dev_info(tsi148_bridge->parent, "CR/CSR Offset: %d\n", cbar);