arm64: tegra: Enable PCIe slots in P2972-0000 board
authorVidya Sagar <vidyas@nvidia.com>
Wed, 12 Jun 2019 09:53:36 +0000 (15:23 +0530)
committerThierry Reding <treding@nvidia.com>
Fri, 21 Jun 2019 14:06:00 +0000 (16:06 +0200)
Enable PCIe controller nodes to enable respective PCIe slots on
P2972-0000 board. Following is the ownership of slots by different
PCIe controllers.
Controller-0 : M.2 Key-M slot
Controller-1 : On-board Marvell eSATA controller
Controller-3 : M.2 Key-E slot

Signed-off-by: Vidya Sagar <vidyas@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
arch/arm64/boot/dts/nvidia/tegra194-p2888.dtsi
arch/arm64/boot/dts/nvidia/tegra194-p2972-0000.dts

index 9f5810765efc69e16df97b849c5a2e627e183f7e..62e07e1197cc772b979c75dccb32dffd4b65d60a 100644 (file)
                                                regulator-boot-on;
                                        };
 
-                                       sd3 {
+                                       vdd_1v8ao: sd3 {
                                                regulator-name = "VDD_1V8AO";
                                                regulator-min-microvolt = <1800000>;
                                                regulator-max-microvolt = <1800000>;
index 899c48dc0a24a7a43c34f80cd6f75878d313dc3b..23597d53c9c9694357d79cbbd8f628ff744c5b86 100644 (file)
                };
        };
 
+       pcie@14100000 {
+               status = "okay";
+
+               vddio-pex-ctl-supply = <&vdd_1v8ao>;
+
+               phys = <&p2u_hsio_0>;
+               phy-names = "p2u-0";
+       };
+
+       pcie@14140000 {
+               status = "okay";
+
+               vddio-pex-ctl-supply = <&vdd_1v8ao>;
+
+               phys = <&p2u_hsio_7>;
+               phy-names = "p2u-0";
+       };
+
+       pcie@14180000 {
+               status = "okay";
+
+               vddio-pex-ctl-supply = <&vdd_1v8ao>;
+
+               phys = <&p2u_hsio_2>, <&p2u_hsio_3>, <&p2u_hsio_4>,
+                      <&p2u_hsio_5>;
+               phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3";
+       };
+
+       pcie@141a0000 {
+               status = "disabled";
+
+               vddio-pex-ctl-supply = <&vdd_1v8ao>;
+
+               phys = <&p2u_nvhs_0>, <&p2u_nvhs_1>, <&p2u_nvhs_2>,
+                      <&p2u_nvhs_3>, <&p2u_nvhs_4>, <&p2u_nvhs_5>,
+                      <&p2u_nvhs_6>, <&p2u_nvhs_7>;
+
+               phy-names = "p2u-0", "p2u-1", "p2u-2", "p2u-3", "p2u-4",
+                           "p2u-5", "p2u-6", "p2u-7";
+       };
+
        fan: fan {
                compatible = "pwm-fan";
                pwms = <&pwm4 0 45334>;