rs6000.c (rs6000_gimple_fold_builtin): Add support for early folding of splat_u{8...

[gcc]

2017-12-11  Will Schmidt  <will_schmidt@vnet.ibm.com>

	* config/rs6000/rs6000.c (rs6000_gimple_fold_builtin): Add support for
	early folding of splat_u{8,16,32}.

[testsuite]

2017-12-11  Will Schmidt  <will_schmidt@vnet.ibm.com>

	* gcc.target/powerpc/fold-vec-splat-misc-invalid.c: New.

From-SVN: r255549

diff --git a/gcc/ChangeLog b/gcc/ChangeLog
index 10ef11c..b1a689f 100644 (file)
--- a/gcc/ChangeLog
+++ b/gcc/ChangeLog
@@ -1,3 +1,8 @@
+2017-12-11  Will Schmidt  <will_schmidt@vnet.ibm.com>
+
+       * config/rs6000/rs6000.c (rs6000_gimple_fold_builtin): Add support for
+       early folding of splat_u{8,16,32}.
+
 2017-12-11  Jakub Jelinek  <jakub@redhat.com>
 
        * config/aarch64/aarch64.c (aarch64_print_operand): Don't start

diff --git a/gcc/config/rs6000/rs6000.c b/gcc/config/rs6000/rs6000.c
index 155ea6e..9ed90bf 100644 (file)
--- a/gcc/config/rs6000/rs6000.c
+++ b/gcc/config/rs6000/rs6000.c
@@ -16621,6 +16621,28 @@ rs6000_gimple_fold_builtin (gimple_stmt_iterator *gsi)
       fold_compare_helper (gsi, LE_EXPR, stmt);
       return true;
 
+    /* flavors of vec_splat_[us]{8,16,32}.  */
+    case ALTIVEC_BUILTIN_VSPLTISB:
+    case ALTIVEC_BUILTIN_VSPLTISH:
+    case ALTIVEC_BUILTIN_VSPLTISW:
+      {
+        arg0 = gimple_call_arg (stmt, 0);
+        lhs = gimple_call_lhs (stmt);
+        /* Only fold the vec_splat_*() if arg0 is constant.  */
+        if (TREE_CODE (arg0) != INTEGER_CST)
+          return false;
+        gimple_seq stmts = NULL;
+        location_t loc = gimple_location (stmt);
+        tree splat_value = gimple_convert (&stmts, loc,
+                                           TREE_TYPE (TREE_TYPE (lhs)), arg0);
+        gsi_insert_seq_before (gsi, stmts, GSI_SAME_STMT);
+        tree splat_tree = build_vector_from_val (TREE_TYPE (lhs), splat_value);
+        g = gimple_build_assign (lhs, splat_tree);
+        gimple_set_location (g, gimple_location (stmt));
+        gsi_replace (gsi, g, true);
+        return true;
+      }
+
     default:
       if (TARGET_DEBUG_BUILTIN)
        fprintf (stderr, "gimple builtin intrinsic not matched:%d %s %s\n",

diff --git a/gcc/testsuite/ChangeLog b/gcc/testsuite/ChangeLog
index acd4578..dced5e7 100644 (file)
--- a/gcc/testsuite/ChangeLog
+++ b/gcc/testsuite/ChangeLog
@@ -1,3 +1,7 @@
+2017-12-11  Will Schmidt  <will_schmidt@vnet.ibm.com>
+
+       * gcc.target/powerpc/fold-vec-splat-misc-invalid.c: New.
+
 2017-12-11  Thomas Koenig  <tkoenig@gcc.gnu.org>
 
        PR fortran/83379

diff --git a/gcc/testsuite/gcc.target/powerpc/fold-vec-splat-misc-invalid.c b/gcc/testsuite/gcc.target/powerpc/fold-vec-splat-misc-invalid.c
new file mode 100644 (file)
index 0000000..20f5b05
--- /dev/null
+++ b/gcc/testsuite/gcc.target/powerpc/fold-vec-splat-misc-invalid.c
@@ -0,0 +1,33 @@
+/* Verify that overloaded built-ins for vec_splat_s8 and vec_splat_s16
+   generate errors as expected when we attempt to use invalid inputs.  */
+
+/* { dg-do compile } */
+/* { dg-require-effective-target powerpc_vsx_ok } */
+/* { dg-options "-mvsx -O2" } */
+
+#include <altivec.h>
+
+vector signed short
+testss_1 (unsigned int ui)
+{
+  return vec_splat_s16 (ui);/* { dg-error "argument 1 must be a 5-bit signed literal" } */
+}
+
+vector unsigned short
+testss_2 (signed int si)
+{
+  return vec_splat_u16 (si);/* { dg-error "argument 1 must be a 5-bit signed literal" } */
+}
+
+vector signed char
+testsc_1 (unsigned int ui)
+{
+  return vec_splat_s8 (ui); /* { dg-error "argument 1 must be a 5-bit signed literal" } */
+}
+
+vector unsigned char
+testsc_2 (signed int si)
+{
+  return vec_splat_u8 (si);/* { dg-error "argument 1 must be a 5-bit signed literal" } */
+}
+