memory: tegra: Correct debugfs clk rate-range on Tegra30
authorDmitry Osipenko <digetx@gmail.com>
Mon, 24 Feb 2020 23:58:35 +0000 (02:58 +0300)
committerThierry Reding <treding@nvidia.com>
Wed, 11 Mar 2020 14:24:16 +0000 (15:24 +0100)
Correctly set clk rate-range if number of available timings is zero.
This fixes noisy "invalid range [4294967295, 0]" error messages during
boot.

Fixes: 8cee32b40040 ("memory: tegra: Implement EMC debugfs interface on Tegra30")
Signed-off-by: Dmitry Osipenko <digetx@gmail.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
drivers/memory/tegra/tegra30-emc.c

index e3efd95..b42bdb6 100644 (file)
@@ -1256,6 +1256,11 @@ static void tegra_emc_debugfs_init(struct tegra_emc *emc)
                        emc->debugfs.max_rate = emc->timings[i].rate;
        }
 
+       if (!emc->num_timings) {
+               emc->debugfs.min_rate = clk_get_rate(emc->clk);
+               emc->debugfs.max_rate = emc->debugfs.min_rate;
+       }
+
        err = clk_set_rate_range(emc->clk, emc->debugfs.min_rate,
                                 emc->debugfs.max_rate);
        if (err < 0) {