arm64: dts: imx8mp-phycore-som: enable spi nor
authorHeiko Schocher <hs@denx.de>
Tue, 9 Mar 2021 05:31:16 +0000 (06:31 +0100)
committerShawn Guo <shawnguo@kernel.org>
Sat, 12 Jun 2021 08:17:02 +0000 (16:17 +0800)
enable the mt25qu256aba spi nor on the imx8mp-phycore-som.

Signed-off-by: Heiko Schocher <hs@denx.de>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>
arch/arm64/boot/dts/freescale/imx8mp-phycore-som.dtsi

index f3965ec..aa78e0d 100644 (file)
        };
 };
 
+&flexspi {
+       pinctrl-names = "default";
+       pinctrl-0 = <&pinctrl_flexspi0>;
+       status = "okay";
+
+       som_flash: flash@0 {
+               compatible = "jedec,spi-nor";
+               reg = <0>;
+               spi-max-frequency = <80000000>;
+               spi-tx-bus-width = <4>;
+               spi-rx-bus-width = <4>;
+       };
+};
+
 &i2c1 {
        clock-frequency = <400000>;
        pinctrl-names = "default", "gpio";
                >;
        };
 
+       pinctrl_flexspi0: flexspi0grp {
+               fsl,pins = <
+                       MX8MP_IOMUXC_NAND_ALE__FLEXSPI_A_SCLK           0x1c2
+                       MX8MP_IOMUXC_NAND_CE0_B__FLEXSPI_A_SS0_B        0x82
+                       MX8MP_IOMUXC_NAND_DATA00__FLEXSPI_A_DATA00      0x82
+                       MX8MP_IOMUXC_NAND_DATA01__FLEXSPI_A_DATA01      0x82
+                       MX8MP_IOMUXC_NAND_DATA02__FLEXSPI_A_DATA02      0x82
+                       MX8MP_IOMUXC_NAND_DATA03__FLEXSPI_A_DATA03      0x82
+               >;
+       };
+
        pinctrl_i2c1: i2c1grp {
                fsl,pins = <
                        MX8MP_IOMUXC_I2C1_SCL__I2C1_SCL         0x400001c3