Register context information was already being passed into the DWARFDebugFrame code that dumps unwind information but it wasn't being used. This change adds the ability to dump registers names of a valid MC register context was passed in and if it knows about the register. Updated the tests to use the newly returned register names.
Differential Revision: https://reviews.llvm.org/D88767
#include "llvm/ADT/StringExtras.h"
#include "llvm/ADT/StringRef.h"
#include "llvm/BinaryFormat/Dwarf.h"
+#include "llvm/MC/MCRegisterInfo.h"
#include "llvm/Support/Casting.h"
#include "llvm/Support/Compiler.h"
#include "llvm/Support/DataExtractor.h"
using namespace llvm;
using namespace dwarf;
+static void printRegister(raw_ostream &OS, const MCRegisterInfo *MRI, bool IsEH,
+ unsigned RegNum) {
+ if (MRI) {
+ if (Optional<unsigned> LLVMRegNum = MRI->getLLVMRegNum(RegNum, IsEH)) {
+ if (const char *RegName = MRI->getName(*LLVMRegNum)) {
+ OS << RegName;
+ return;
+ }
+ }
+ }
+ OS << "reg" << RegNum;
+}
// See DWARF standard v3, section 7.23
const uint8_t DWARF_CFI_PRIMARY_OPCODE_MASK = 0xc0;
OS << format(" %" PRId64 "*data_alignment_factor" , Operand);
break;
case OT_Register:
- OS << format(" reg%" PRId64, Operand);
+ OS << ' ';
+ printRegister(OS, MRI, IsEH, Operand);
break;
case OT_Expression:
assert(Instr.Expression && "missing DWARFExpression object");
# FDECFIEncoding and should be DW_EH_PE_pcrel | DW_EH_PE_sdata4 (0x1b).
# CHECK: Augmentation data: 1B
-# CHECK: DW_CFA_def_cfa: reg2 +0
+# CHECK: DW_CFA_def_cfa: X2 +0
#
# CHECK: 00000014 00000010 00000018 FDE cie=00000000 pc=00000000...00000004
# CHECK: DW_CFA_nop:
; FRAMES: 00000000 00000010 ffffffff CIE
; FRAMES: Version: 1
-; FRAMES: DW_CFA_def_cfa: reg4 +4
-; FRAMES-NEXT: DW_CFA_offset: reg8 -4
+; FRAMES: DW_CFA_def_cfa: ESP +4
+; FRAMES-NEXT: DW_CFA_offset: EIP -4
; FRAMES-NEXT: DW_CFA_nop:
; FRAMES-NEXT: DW_CFA_nop:
; FRAMES: 00000028 00000014 00000000 FDE cie=00000000 pc=00000030...00000080
; FRAMES: DW_CFA_advance_loc: 1
; FRAMES-NEXT: DW_CFA_def_cfa_offset: +8
-; FRAMES-NEXT: DW_CFA_offset: reg5 -8
+; FRAMES-NEXT: DW_CFA_offset: EBP -8
; FRAMES-NEXT: DW_CFA_advance_loc: 2
-; FRAMES-NEXT: DW_CFA_def_cfa_register: reg5
+; FRAMES-NEXT: DW_CFA_def_cfa_register: EBP
; FRAMES-NOT: CIE
; FRAMES-NOT: FDE
nop
// CHECK: DW_CFA_advance_loc: 1
.cfi_restore %rbp
-// CHECK-NEXT: DW_CFA_restore: reg6
+// CHECK-NEXT: DW_CFA_restore: RBP
nop
// CHECK-NEXT: DW_CFA_advance_loc: 1
.cfi_restore 89
// CHECK-NEXT: DW_CFA_nop:
nop
.cfi_endproc
-
// DWARF32_PIC-NEXT: Augmentation data: 1B
// ^^ fde pointer encoding: DW_EH_PE_pcrel | DW_EH_PE_sdata4
// DWARF32-EMPTY:
-// DWARF32-NEXT: DW_CFA_def_cfa_register: reg29
+// DWARF32-NEXT: DW_CFA_def_cfa_register: SP_64
//
// DWARF32_ABS: 00000014 00000010 00000018 FDE cie=00000000 pc=00000000...00000000
// DWARF32_PIC: 00000014 00000010 00000018 FDE cie=00000000 pc=0000001c...0000001c
// DWARF64_PIC: Augmentation data: 1B
// ^^ fde pointer encoding: DW_EH_PE_pcrel | DW_EH_PE_sdata4
// DWARF64-EMPTY:
-// DWARF64-NEXT: DW_CFA_def_cfa_register: reg29
+// DWARF64-NEXT: DW_CFA_def_cfa_register: SP_64
// DWARF64_PIC-NEXT: DW_CFA_nop:
//
// DWARF64_ABS: 00000014 00000018 00000018 FDE cie=00000000 pc=00000000...00000000
; CHECK: .debug_frame contents:
; CHECK: ffffffff CIE
; CHECK-NOT: {{CIE|FDE}}
-; CHECK: DW_CFA_def_cfa: reg4 +4
+; CHECK: DW_CFA_def_cfa: ESP +4
; ModuleID = 'foo.c'
target datalayout = "e-m:o-p:32:32-f64:32:64-f80:128-n8:16:32-S128"