scsi: ufs: ufs-mediatek: Use device parameter initialization function

Use common device parameter initialization function instead of initializing
those parameters by vendor driver itself.

Link: https://lore.kernel.org/r/20201116065054.7658-4-stanley.chu@mediatek.com
Reviewed-by: Bean Huo <beanhuo@micron.com>
Signed-off-by: Stanley Chu <stanley.chu@mediatek.com>
Signed-off-by: Martin K. Petersen <martin.petersen@oracle.com>

diff --git a/drivers/scsi/ufs/ufs-mediatek.c b/drivers/scsi/ufs/ufs-mediatek.c
index b9b4237..87b4bf1 100644 (file)
--- a/drivers/scsi/ufs/ufs-mediatek.c
+++ b/drivers/scsi/ufs/ufs-mediatek.c
@@ -680,19 +680,9 @@ static int ufs_mtk_pre_pwr_change(struct ufs_hba *hba,
        u32 adapt_val;
        int ret;
 
-       host_cap.tx_lanes = UFS_MTK_LIMIT_NUM_LANES_TX;
-       host_cap.rx_lanes = UFS_MTK_LIMIT_NUM_LANES_RX;
-       host_cap.hs_rx_gear = UFS_MTK_LIMIT_HSGEAR_RX;
-       host_cap.hs_tx_gear = UFS_MTK_LIMIT_HSGEAR_TX;
-       host_cap.pwm_rx_gear = UFS_MTK_LIMIT_PWMGEAR_RX;
-       host_cap.pwm_tx_gear = UFS_MTK_LIMIT_PWMGEAR_TX;
-       host_cap.rx_pwr_pwm = UFS_MTK_LIMIT_RX_PWR_PWM;
-       host_cap.tx_pwr_pwm = UFS_MTK_LIMIT_TX_PWR_PWM;
-       host_cap.rx_pwr_hs = UFS_MTK_LIMIT_RX_PWR_HS;
-       host_cap.tx_pwr_hs = UFS_MTK_LIMIT_TX_PWR_HS;
-       host_cap.hs_rate = UFS_MTK_LIMIT_HS_RATE;
-       host_cap.desired_working_mode =
-                               UFS_MTK_LIMIT_DESIRED_MODE;
+       ufshcd_init_pwr_dev_param(&host_cap);
+       host_cap.hs_rx_gear = UFS_HS_G4;
+       host_cap.hs_tx_gear = UFS_HS_G4;
 
        ret = ufshcd_get_pwr_dev_param(&host_cap,
                                       dev_max_params,

diff --git a/drivers/scsi/ufs/ufs-mediatek.h b/drivers/scsi/ufs/ufs-mediatek.h
index ac37b11..93d3509 100644 (file)
--- a/drivers/scsi/ufs/ufs-mediatek.h
+++ b/drivers/scsi/ufs/ufs-mediatek.h
@@ -31,22 +31,6 @@
 #define REFCLK_REQ_TIMEOUT_US       3000
 
 /*
- * Vendor specific pre-defined parameters
- */
-#define UFS_MTK_LIMIT_NUM_LANES_RX  2
-#define UFS_MTK_LIMIT_NUM_LANES_TX  2
-#define UFS_MTK_LIMIT_HSGEAR_RX     UFS_HS_G4
-#define UFS_MTK_LIMIT_HSGEAR_TX     UFS_HS_G4
-#define UFS_MTK_LIMIT_PWMGEAR_RX    UFS_PWM_G4
-#define UFS_MTK_LIMIT_PWMGEAR_TX    UFS_PWM_G4
-#define UFS_MTK_LIMIT_RX_PWR_PWM    SLOW_MODE
-#define UFS_MTK_LIMIT_TX_PWR_PWM    SLOW_MODE
-#define UFS_MTK_LIMIT_RX_PWR_HS     FAST_MODE
-#define UFS_MTK_LIMIT_TX_PWR_HS     FAST_MODE
-#define UFS_MTK_LIMIT_HS_RATE       PA_HS_MODE_B
-#define UFS_MTK_LIMIT_DESIRED_MODE  UFS_HS_MODE
-
-/*
  * Other attributes
  */
 #define VS_DEBUGCLOCKENABLE         0xD0A1