gpu: ipu-v3: Fix IC control register offset

The IC register offset is at +0x20000 relative to the control module
registers on all IPUv3 versions. This patch fixes wrong values for
i.MX51 and i.MX53.

Signed-off-by: Philipp Zabel <p.zabel@pengutronix.de>

diff --git a/drivers/gpu/ipu-v3/ipu-common.c b/drivers/gpu/ipu-v3/ipu-common.c
index f707d25..67bab5c 100644 (file)
--- a/drivers/gpu/ipu-v3/ipu-common.c
+++ b/drivers/gpu/ipu-v3/ipu-common.c
@@ -742,7 +742,7 @@ static struct ipu_devtype ipu_type_imx51 = {
        .tpm_ofs = 0x1f060000,
        .csi0_ofs = 0x1f030000,
        .csi1_ofs = 0x1f038000,
-       .ic_ofs = 0x1f020000,
+       .ic_ofs = 0x1e020000,
        .disp0_ofs = 0x1e040000,
        .disp1_ofs = 0x1e048000,
        .dc_tmpl_ofs = 0x1f080000,
@@ -758,7 +758,7 @@ static struct ipu_devtype ipu_type_imx53 = {
        .tpm_ofs = 0x07060000,
        .csi0_ofs = 0x07030000,
        .csi1_ofs = 0x07038000,
-       .ic_ofs = 0x07020000,
+       .ic_ofs = 0x06020000,
        .disp0_ofs = 0x06040000,
        .disp1_ofs = 0x06048000,
        .dc_tmpl_ofs = 0x07080000,