+2016-05-20 Matthew Fortune <matthew.fortune@imgtec.com>
+
+ * config/tc-mips.c (mips_cpu_info_table): Update comment. Add
+ p6600 entry.
+ * doc/c-mips.texi: Document p6600 -march option.
+
2016-05-20 H.J. Lu <hongjiu.lu@intel.com>
PR gas/19600
MIPS64R2 rather than MIPS64. */
{ "xlp", 0, 0, ISA_MIPS64R2, CPU_XLR },
- /* i6400. */
+ /* MIPS 64 Release 6 */
{ "i6400", 0, ASE_MSA, ISA_MIPS64R6, CPU_MIPS64R6},
+ { "p6600", 0, ASE_VIRT | ASE_MSA, ISA_MIPS64R6, CPU_MIPS64R6},
/* End marker */
{ NULL, 0, 0, 0, 0 }