PR rtl-optimization/67786
PR rtl-optimization/67787
* ifcvt.c (bb_valid_for_noce_process_p): Reject basic block if
it modifies a reg used in the condition calculation.
* gcc.dg/pr67786.c: New test.
* gcc.dg/pr67787.c: Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@228375
138bc75d-0d04-0410-961f-
82ee72b054a4
+2015-10-02 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ PR rtl-optimization/67786
+ PR rtl-optimization/67787
+ * ifcvt.c (bb_valid_for_noce_process_p): Reject basic block if
+ it modifies a reg used in the condition calculation.
+
2015-10-02 James Greenhalgh <james.greenhalgh@arm.com>
* config/aarch64/aarch64-simd.md (*aarch64_combinez<mode>): Add
gcc_assert (sset);
if (contains_mem_rtx_p (SET_SRC (sset))
- || !REG_P (SET_DEST (sset)))
+ || !REG_P (SET_DEST (sset))
+ || reg_overlap_mentioned_p (SET_DEST (sset), cond))
goto free_bitmap_and_fail;
potential_cost += insn_rtx_cost (sset, speed_p);
+2015-10-02 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
+
+ PR rtl-optimization/67786
+ PR rtl-optimization/67787
+ * gcc.dg/pr67786.c: New test.
+ * gcc.dg/pr67787.c: Likewise.
+
2015-10-02 James Greenhalgh <james.greenhalgh@arm.com>
* gcc.target/aarch64/vect_combine_zeroes_1.c: New.
--- /dev/null
+/* { dg-do run } */
+/* { dg-options "-O3" } */
+
+int a, b = 10;
+char c;
+
+int
+main ()
+{
+ char d;
+ int e = 5;
+ for (a = 0; a; a--)
+ e = 0;
+ c = (b & 15) ^ e;
+ d = c > e ? c : c << e;
+ __builtin_printf ("%d\n", d);
+ return 0;
+}
+
+/* { dg-output "15" } */
--- /dev/null
+/* { dg-do run } */
+/* { dg-options "-O3" } */
+
+int a, c, f, g;
+char b;
+
+static int
+fn1 ()
+{
+ char h;
+ int k = -1, i, j;
+ for (; b < 16; b++)
+ ;
+ __builtin_printf (" ");
+ if (b < 5)
+ k++;
+ if (k)
+ {
+ int l = 2;
+ a = h = b < 0 || b > (127 >> l) ? b : b << 1;
+ return 0;
+ }
+ for (i = 0; i < 1; i++)
+ for (j = 0; j < 7; j++)
+ f = 0;
+ for (c = 0; c; c++)
+ ;
+ if (g)
+ for (;;)
+ ;
+ return 0;
+}
+
+int
+main ()
+{
+ fn1 ();
+
+ if (a != 32)
+ __builtin_abort ();
+
+ return 0;
+}