perf intel-pt: Fix TSC slip

commit f3b4e06b3bda759afd042d3d5fa86bea8f1fe278 upstream.

A TSC packet can slip past MTC packets so that the timestamp appears to
go backwards. One estimate is that can be up to about 40 CPU cycles,
which is certainly less than 0x1000 TSC ticks, but accept slippage an
order of magnitude more to be on the safe side.

Signed-off-by: Adrian Hunter <adrian.hunter@intel.com>
Cc: Jiri Olsa <jolsa@redhat.com>
Cc: stable@vger.kernel.org
Fixes: 79b58424b821c ("perf tools: Add Intel PT support for decoding MTC packets")
Link: http://lkml.kernel.org/r/20190325135135.18348-1-adrian.hunter@intel.com
Signed-off-by: Arnaldo Carvalho de Melo <acme@redhat.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>

diff --git a/tools/perf/util/intel-pt-decoder/intel-pt-decoder.c b/tools/perf/util/intel-pt-decoder/intel-pt-decoder.c
index f3db68a..0bc3e6e 100644 (file)
--- a/tools/perf/util/intel-pt-decoder/intel-pt-decoder.c
+++ b/tools/perf/util/intel-pt-decoder/intel-pt-decoder.c
@@ -251,19 +251,15 @@ struct intel_pt_decoder *intel_pt_decoder_new(struct intel_pt_params *params)
                if (!(decoder->tsc_ctc_ratio_n % decoder->tsc_ctc_ratio_d))
                        decoder->tsc_ctc_mult = decoder->tsc_ctc_ratio_n /
                                                decoder->tsc_ctc_ratio_d;
-
-               /*
-                * Allow for timestamps appearing to backwards because a TSC
-                * packet has slipped past a MTC packet, so allow 2 MTC ticks
-                * or ...
-                */
-               decoder->tsc_slip = multdiv(2 << decoder->mtc_shift,
-                                       decoder->tsc_ctc_ratio_n,
-                                       decoder->tsc_ctc_ratio_d);
        }
-       /* ... or 0x100 paranoia */
-       if (decoder->tsc_slip < 0x100)
-               decoder->tsc_slip = 0x100;
+
+       /*
+        * A TSC packet can slip past MTC packets so that the timestamp appears
+        * to go backwards. One estimate is that can be up to about 40 CPU
+        * cycles, which is certainly less than 0x1000 TSC ticks, but accept
+        * slippage an order of magnitude more to be on the safe side.
+        */
+       decoder->tsc_slip = 0x10000;
 
        intel_pt_log("timestamp: mtc_shift %u\n", decoder->mtc_shift);
        intel_pt_log("timestamp: tsc_ctc_ratio_n %u\n", decoder->tsc_ctc_ratio_n);