}
static void
+print_base_devinfo(const struct intel_device_info *devinfo)
+{
+ fprintf(stdout, "devinfo struct size = %zu\n", sizeof(*devinfo));
+
+ fprintf(stdout, " name: %s\n", devinfo->name);
+ fprintf(stdout, " gen: %u\n", devinfo->ver);
+ fprintf(stdout, " PCI device id: 0x%x\n", devinfo->pci_device_id);
+ fprintf(stdout, " PCI domain: 0x%x\n", devinfo->pci_domain);
+ fprintf(stdout, " PCI bus: 0x%x\n", devinfo->pci_bus);
+ fprintf(stdout, " PCI dev: 0x%x\n", devinfo->pci_dev);
+ fprintf(stdout, " PCI function: 0x%x\n", devinfo->pci_func);
+ fprintf(stdout, " PCI revision id: 0x%x\n", devinfo->pci_revision_id);
+ fprintf(stdout, " revision: %u\n", devinfo->revision);
+
+ const char *subslice_name = devinfo->ver >= 12 ? "dualsubslice" : "subslice";
+ uint32_t n_s = 0, n_ss = 0, n_eus = 0;
+ for (unsigned s = 0; s < devinfo->max_slices; s++) {
+ n_s += (devinfo->slice_masks & (1u << s)) ? 1 : 0;
+ for (unsigned ss = 0; ss < devinfo->max_subslices_per_slice; ss++) {
+ fprintf(stdout, " slice%u.%s%u: ", s, subslice_name, ss);
+ if (intel_device_info_subslice_available(devinfo, s, ss)) {
+ n_ss++;
+ for (unsigned eu = 0; eu < devinfo->max_eus_per_subslice; eu++) {
+ n_eus += intel_device_info_eu_available(devinfo, s, ss, eu) ? 1 : 0;
+ fprintf(stdout, "%s", intel_device_info_eu_available(devinfo, s, ss, eu) ? "1" : "0");
+ }
+ } else {
+ fprintf(stdout, "fused");
+ }
+ fprintf(stdout, "\n");
+ }
+ }
+ for (uint32_t pp = 0; pp < ARRAY_SIZE(devinfo->ppipe_subslices); pp++) {
+ fprintf(stdout, " pixel pipe %02u: %u\n",
+ pp, devinfo->ppipe_subslices[pp]);
+ }
+
+ fprintf(stdout, " slices: %u\n", n_s);
+ fprintf(stdout, " %s: %u\n", subslice_name, n_ss);
+ fprintf(stdout, " EUs: %u\n", n_eus);
+ fprintf(stdout, " EU threads: %u\n", n_eus * devinfo->num_thread_per_eu);
+
+ fprintf(stdout, " LLC: %u\n", devinfo->has_llc);
+ fprintf(stdout, " threads per EU: %u\n", devinfo->num_thread_per_eu);
+ fprintf(stdout, " URB size: %u\n", devinfo->urb.size);
+ fprintf(stdout, " L3 banks: %u\n", devinfo->l3_banks);
+ fprintf(stdout, " max VS threads: %u\n", devinfo->max_vs_threads);
+ fprintf(stdout, " max TCS threads: %u\n", devinfo->max_tcs_threads);
+ fprintf(stdout, " max TES threads: %u\n", devinfo->max_tes_threads);
+ fprintf(stdout, " max GS threads: %u\n", devinfo->max_gs_threads);
+ fprintf(stdout, " max WM threads: %u\n", devinfo->max_wm_threads);
+ fprintf(stdout, " max CS threads: %u\n", devinfo->max_cs_threads);
+ fprintf(stdout, " timestamp frequency: %" PRIu64 " / %.4f ns\n",
+ devinfo->timestamp_frequency, 1000000000.0 / devinfo->timestamp_frequency);
+
+}
+
+static void
print_regions_info(const struct intel_device_info *devinfo)
{
if (devinfo->mem.sram.mappable.size > 0 ||
int max_devices, i;
char c;
bool help = false, print_hwconfig = false, all = false, print_workarounds = false;
+ const char *platform = NULL;
const struct option opts[] = {
- { "help", no_argument, (int *) &help, true },
- { "hwconfig", no_argument, (int *) &print_hwconfig, true },
- { "workarounds", no_argument, (int *) &print_workarounds, true },
- { "all", no_argument, (int *) &all, true },
+ { "help", no_argument, (int *) &help, true },
+ { "platform", required_argument, NULL, false },
+ { "hwconfig", no_argument, (int *) &print_hwconfig, true },
+ { "workarounds", no_argument, (int *) &print_workarounds, true },
+ { "all", no_argument, (int *) &all, true },
};
- while ((c = getopt_long(argc, argv, "ha", opts, &i)) != -1) {
+ while ((c = getopt_long(argc, argv, "hap:", opts, &i)) != -1) {
switch (c) {
case 'h':
help = true;
case 'a':
all = true;
break;
+ case 'p':
+ platform = optarg;
+ break;
default:
break;
}
fprintf(stdout,
"Usage: intel_dev_info [OPTION]\n"
"Print device info for the current system.\n"
- " --help / h display this help and exit\n"
- " --hwconfig print the hwconfig table\n"
- " --workarounds print the list of hardware workarounds for the system\n"
- " --all / -a print all optional details\n");
+ " --help / h display this help and exit\n"
+ " --platform <name> print a given platform's info (skl, icl, tgl, etc...)\n"
+ " --hwconfig print the hwconfig table\n"
+ " --workarounds print the list of hardware workarounds for the system\n"
+ " --all / -a print all optional details\n");
exit(0);
}
print_workarounds = true;
print_hwconfig = true;
}
- max_devices = drmGetDevices2(0, devices, ARRAY_SIZE(devices));
- if (max_devices < 1)
- return error("Not device found");
- for (int i = 0; i < max_devices; i++) {
+ if (platform) {
+ int pci_id = intel_device_name_to_pci_device_id(platform);
+
struct intel_device_info devinfo;
- const char *path = devices[i]->nodes[DRM_NODE_RENDER];
- int fd = open(path, O_RDWR | O_CLOEXEC);
+ if (!intel_get_device_info_from_pci_id(pci_id, &devinfo))
+ return error("No platform found with name: %s", platform);
- if (fd < 0)
- continue;
+ print_base_devinfo(&devinfo);
+ if (print_workarounds)
+ print_wa_info(&devinfo);
+ } else {
+ max_devices = drmGetDevices2(0, devices, ARRAY_SIZE(devices));
+ if (max_devices < 1)
+ return error("Not device found");
- if (print_hwconfig) {
- intel_get_and_print_hwconfig_table(fd);
- }
+ for (int i = 0; i < max_devices; i++) {
+ struct intel_device_info devinfo;
+ const char *path = devices[i]->nodes[DRM_NODE_RENDER];
+ int fd = open(path, O_RDWR | O_CLOEXEC);
- bool success = intel_get_device_info_from_fd(fd, &devinfo);
- close(fd);
-
- if (!success)
- continue;
-
- fprintf(stdout, "devinfo struct size = %zu\n", sizeof(devinfo));
-
- fprintf(stdout, "%s:\n", path);
-
- fprintf(stdout, " name: %s\n", devinfo.name);
- fprintf(stdout, " gen: %u\n", devinfo.ver);
- fprintf(stdout, " PCI device id: 0x%x\n", devinfo.pci_device_id);
- fprintf(stdout, " PCI domain: 0x%x\n", devinfo.pci_domain);
- fprintf(stdout, " PCI bus: 0x%x\n", devinfo.pci_bus);
- fprintf(stdout, " PCI dev: 0x%x\n", devinfo.pci_dev);
- fprintf(stdout, " PCI function: 0x%x\n", devinfo.pci_func);
- fprintf(stdout, " PCI revision id: 0x%x\n", devinfo.pci_revision_id);
- fprintf(stdout, " revision: %u\n", devinfo.revision);
-
- const char *subslice_name = devinfo.ver >= 12 ? "dualsubslice" : "subslice";
- uint32_t n_s = 0, n_ss = 0, n_eus = 0;
- for (unsigned s = 0; s < devinfo.max_slices; s++) {
- n_s += (devinfo.slice_masks & (1u << s)) ? 1 : 0;
- for (unsigned ss = 0; ss < devinfo.max_subslices_per_slice; ss++) {
- fprintf(stdout, " slice%u.%s%u: ", s, subslice_name, ss);
- if (intel_device_info_subslice_available(&devinfo, s, ss)) {
- n_ss++;
- for (unsigned eu = 0; eu < devinfo.max_eus_per_subslice; eu++) {
- n_eus += intel_device_info_eu_available(&devinfo, s, ss, eu) ? 1 : 0;
- fprintf(stdout, "%s", intel_device_info_eu_available(&devinfo, s, ss, eu) ? "1" : "0");
- }
- } else {
- fprintf(stdout, "fused");
- }
- fprintf(stdout, "\n");
- }
- }
- for (uint32_t pp = 0; pp < ARRAY_SIZE(devinfo.ppipe_subslices); pp++) {
- fprintf(stdout, " pixel pipe %02u: %u\n",
- pp, devinfo.ppipe_subslices[pp]);
- }
+ if (fd < 0)
+ continue;
- fprintf(stdout, " slices: %u\n", n_s);
- fprintf(stdout, " %s: %u\n", subslice_name, n_ss);
- fprintf(stdout, " EUs: %u\n", n_eus);
- fprintf(stdout, " EU threads: %u\n", n_eus * devinfo.num_thread_per_eu);
-
- fprintf(stdout, " LLC: %u\n", devinfo.has_llc);
- fprintf(stdout, " threads per EU: %u\n", devinfo.num_thread_per_eu);
- fprintf(stdout, " URB size: %u\n", devinfo.urb.size);
- fprintf(stdout, " L3 banks: %u\n", devinfo.l3_banks);
- fprintf(stdout, " max VS threads: %u\n", devinfo.max_vs_threads);
- fprintf(stdout, " max TCS threads: %u\n", devinfo.max_tcs_threads);
- fprintf(stdout, " max TES threads: %u\n", devinfo.max_tes_threads);
- fprintf(stdout, " max GS threads: %u\n", devinfo.max_gs_threads);
- fprintf(stdout, " max WM threads: %u\n", devinfo.max_wm_threads);
- fprintf(stdout, " max CS threads: %u\n", devinfo.max_cs_threads);
- fprintf(stdout, " timestamp frequency: %" PRIu64 " / %.4f ns\n",
- devinfo.timestamp_frequency, 1000000000.0 / devinfo.timestamp_frequency);
-
- print_regions_info(&devinfo);
- if (print_workarounds)
- print_wa_info(&devinfo);
+ bool success = intel_get_device_info_from_fd(fd, &devinfo);
+ close(fd);
+
+ if (!success)
+ continue;
+
+ fprintf(stdout, "%s:\n", path);
+
+ print_base_devinfo(&devinfo);
+ print_regions_info(&devinfo);
+ if (print_hwconfig)
+ intel_get_and_print_hwconfig_table(fd);
+ if (print_workarounds)
+ print_wa_info(&devinfo);
+ }
}
return EXIT_SUCCESS;