arc/nps400: Add new instructions

Add some new control instructions to the opcodes library, and a new test
for these new instructions to the assembler.  The new instructions use
an instruction flag longer than any seen before (on arc), and so the max
flag length is extended to accommodate this.

gas/ChangeLog:

	* config/tc-arc.h (MAX_FLAG_NAME_LENGTH): Increase to 7.
	* testsuite/gas/arc/nps400-2.d: New file.
	* testsuite/gas/arc/nps400-2.s: New file.

opcodes/ChangeLog:

	* arc-nps400-tbl.h: Add schd, sync, and hwschd instructions.
	* arc-opc.c (arc_flag_operands): Add new flags.
	(arc_flag_classes): Add new classes.

diff --git a/gas/ChangeLog b/gas/ChangeLog
index dc7cb01..342768f 100644 (file)
--- a/gas/ChangeLog
+++ b/gas/ChangeLog
@@ -1,5 +1,11 @@
 2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>
 
+       * config/tc-arc.h (MAX_FLAG_NAME_LENGTH): Increase to 7.
+       * testsuite/gas/arc/nps400-2.d: New file.
+       * testsuite/gas/arc/nps400-2.s: New file.
+
+2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>
+
        * config/tc-arc.c (struct arc_opcode_hash_entry_iterator): New
        structure.
        (arc_opcode_hash_entry_iterator_init): New function.

diff --git a/gas/config/tc-arc.h b/gas/config/tc-arc.h
index 7c193fe..076afea 100644 (file)
--- a/gas/config/tc-arc.h
+++ b/gas/config/tc-arc.h
@@ -211,7 +211,7 @@ extern int tc_arc_regname_to_dw2regnum (char *regname);
 #define NOP_OPCODE_S   0x000078E0
 #define NOP_OPCODE_L   0x264A7000 /* mov 0,0.  */
 
-#define MAX_FLAG_NAME_LENGTH 3
+#define MAX_FLAG_NAME_LENGTH 7
 
 struct arc_flags
 {

diff --git a/gas/testsuite/gas/arc/nps400-2.d b/gas/testsuite/gas/arc/nps400-2.d
new file mode 100644 (file)
index 0000000..966907e
--- /dev/null
+++ b/gas/testsuite/gas/arc/nps400-2.d
@@ -0,0 +1,18 @@
+#as: -mcpu=nps400
+#objdump: -dr
+
+.*: +file format .*arc.*
+
+Disassembly of section .text:
+
+[0-9a-f]+ <.*>:
+   0:  3e6f 7004               schd\.rw
+   4:  3e6f 7084               schd\.rd
+   8:  3e6f 7044               schd\.wft
+   c:  3e6f 7144               schd\.wft\.ie1
+  10:  3e6f 7244               schd\.wft\.ie2
+  14:  3e6f 7344               schd\.wft\.ie12
+  18:  3e6f 703f               sync\.rd
+  1c:  3e6f 707f               sync\.wr
+  20:  3a6f 10bf               hwschd\.off     r10
+  24:  3e6f 7503               hwschd\.restore 0,r20

diff --git a/gas/testsuite/gas/arc/nps400-2.s b/gas/testsuite/gas/arc/nps400-2.s
new file mode 100644 (file)
index 0000000..de4c839
--- /dev/null
+++ b/gas/testsuite/gas/arc/nps400-2.s
@@ -0,0 +1,16 @@
+        .text
+        ;; schd
+        schd.rw
+        schd.rd
+        schd.wft
+        schd.wft.ie1
+        schd.wft.ie2
+        schd.wft.ie12
+
+        ;; sync
+        sync.rd
+        sync.wr
+
+        ;; hwschd
+        hwschd.off      r10
+        hwschd.restore  0, r20

diff --git a/opcodes/ChangeLog b/opcodes/ChangeLog
index 294a688..a91544e 100644 (file)
--- a/opcodes/ChangeLog
+++ b/opcodes/ChangeLog
@@ -1,5 +1,11 @@
 2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>
 
+       * arc-nps400-tbl.h: Add schd, sync, and hwschd instructions.
+       * arc-opc.c (arc_flag_operands): Add new flags.
+       (arc_flag_classes): Add new classes.
+
+2016-04-07  Andrew Burgess  <andrew.burgess@embecosm.com>
+
        * arc-opc.c (arc_opcodes): Extend comment to discus table layout.
 
 2016-04-05  Andrew Burgess  <andrew.burgess@embecosm.com>

diff --git a/opcodes/arc-nps400-tbl.h b/opcodes/arc-nps400-tbl.h
index dc7b066..58d479f 100644 (file)
--- a/opcodes/arc-nps400-tbl.h
+++ b/opcodes/arc-nps400-tbl.h
@@ -123,3 +123,20 @@
 
 /* crc32<.r> 0,limm,u6         00111 110 01 110100 R 111 uuuuuu 111110 */
 { "crc32", 0x3e74703e, 0xffff703f, ARC_OPCODE_NPS400, BITOP, NONE, { ZA, LIMM, UIMM6_20 }, { C_NPS_R }},
+
+/****                  Pipeline Control Instructions                  ****/
+
+/* schd<.rw|.rd> */
+{ "schd", 0x3e6f7004, 0xffffff7f, ARC_OPCODE_NPS400, CONTROL, NONE, { 0 }, { C_NPS_SCHD_RW }},
+
+/* schd.wft.<.ie1|.ie2|.ie12> */
+{ "schd", 0x3e6f7044, 0xfffffcff, ARC_OPCODE_NPS400, CONTROL, NONE, { 0 }, { C_NPS_SCHD_TRIG, C_NPS_SCHD_IE }},
+
+/* sync<.rd|.wr> */
+{ "sync", 0x3e6f703f, 0xffffffbf, ARC_OPCODE_NPS400, CONTROL, NONE, { 0 }, { C_NPS_SYNC }},
+
+/* hwscd.off B */
+{ "hwschd", 0x386f00bf, 0xf8ff8fff, ARC_OPCODE_NPS400, CONTROL, NONE, { RB }, { C_NPS_HWS_OFF }},
+
+/* hwscd.restore 0,C */
+{ "hwschd", 0x3e6f7003, 0xfffff03f, ARC_OPCODE_NPS400, CONTROL, NONE, { ZA, RC }, { C_NPS_HWS_RESTORE }},

diff --git a/opcodes/arc-opc.c b/opcodes/arc-opc.c
index 69c65fc..d667a78 100644 (file)
--- a/opcodes/arc-opc.c
+++ b/opcodes/arc-opc.c
@@ -1003,6 +1003,37 @@ const struct arc_flag_operand arc_flag_operands[] =
 
 #define F_NPS_R     (F_NPS_FLAG + 1)
   { "r",  1, 1, 15, 1 },
+
+#define F_NPS_RW     (F_NPS_R + 1)
+  { "rw", 0, 1, 7, 1 },
+
+#define F_NPS_RD     (F_NPS_RW + 1)
+  { "rd", 1, 1, 7, 1 },
+
+#define F_NPS_WFT     (F_NPS_RD + 1)
+  { "wft", 0, 0, 0, 1 },
+
+#define F_NPS_IE1     (F_NPS_WFT + 1)
+  { "ie1", 1, 2, 8, 1 },
+
+#define F_NPS_IE2     (F_NPS_IE1 + 1)
+  { "ie2", 2, 2, 8, 1 },
+
+#define F_NPS_IE12     (F_NPS_IE2 + 1)
+  { "ie12", 3, 2, 8, 1 },
+
+#define F_NPS_SYNC_RD     (F_NPS_IE12 + 1)
+  { "rd", 0, 1, 6, 1 },
+
+#define F_NPS_SYNC_WR     (F_NPS_SYNC_RD + 1)
+  { "wr", 1, 1, 6, 1 },
+
+#define F_NPS_HWS_OFF     (F_NPS_SYNC_WR + 1)
+  { "off", 0, 0, 0, 1 },
+
+#define F_NPS_HWS_RESTORE     (F_NPS_HWS_OFF + 1)
+  { "restore", 0, 0, 0, 1 },
+
 };
 
 const unsigned arc_num_flag_operands = ARRAY_SIZE (arc_flag_operands);
@@ -1084,6 +1115,25 @@ const struct arc_flag_class arc_flag_classes[] =
 
 #define C_NPS_R     (C_NPS_F + 1)
   { F_CLASS_OPTIONAL, { F_NPS_R, F_NULL}},
+
+#define C_NPS_SCHD_RW     (C_NPS_R + 1)
+  { F_CLASS_REQUIRED, { F_NPS_RW, F_NPS_RD, F_NULL}},
+
+#define C_NPS_SCHD_TRIG     (C_NPS_SCHD_RW + 1)
+  { F_CLASS_REQUIRED, { F_NPS_WFT, F_NULL}},
+
+#define C_NPS_SCHD_IE     (C_NPS_SCHD_TRIG + 1)
+  { F_CLASS_OPTIONAL, { F_NPS_IE1, F_NPS_IE2, F_NPS_IE12, F_NULL}},
+
+#define C_NPS_SYNC     (C_NPS_SCHD_IE + 1)
+  { F_CLASS_REQUIRED, { F_NPS_SYNC_RD, F_NPS_SYNC_WR, F_NULL}},
+
+#define C_NPS_HWS_OFF     (C_NPS_SYNC + 1)
+  { F_CLASS_REQUIRED, { F_NPS_HWS_OFF, F_NULL}},
+
+#define C_NPS_HWS_RESTORE     (C_NPS_HWS_OFF + 1)
+  { F_CLASS_REQUIRED, { F_NPS_HWS_RESTORE, F_NULL}},
+
 };
 
 /* The operands table.