; NOTE: Assertions have been autogenerated by utils/update_test_checks.py
; RUN: opt < %s -passes=instcombine -S | FileCheck %s
declare void @use8(i8)
+declare i64 @llvm.vscale.i64()
define i8 @srem_non_matching(i8 %X, i8 %Y) {
; CHECK-LABEL: @srem_non_matching(
%r = urem i8 %BO0, %BO1
ret i8 %r
}
+
+; Negative test: No attribute vscale_range to indicate range
+define i64 @urem_shl_vscale() {
+; CHECK-LABEL: @urem_shl_vscale(
+; CHECK-NEXT: [[VSCALE:%.*]] = call i64 @llvm.vscale.i64()
+; CHECK-NEXT: [[SHIFT:%.*]] = shl nuw nsw i64 [[VSCALE]], 2
+; CHECK-NEXT: [[REM:%.*]] = urem i64 1024, [[SHIFT]]
+; CHECK-NEXT: ret i64 [[REM]]
+;
+ %vscale = call i64 @llvm.vscale.i64()
+ %shift = shl nuw nsw i64 %vscale, 2
+ %rem = urem i64 1024, %shift
+ ret i64 %rem
+}
+
+define i64 @urem_shl_vscale_range() vscale_range(1,16) {
+; CHECK-LABEL: @urem_shl_vscale_range(
+; CHECK-NEXT: [[VSCALE:%.*]] = call i64 @llvm.vscale.i64()
+; CHECK-NEXT: [[SHIFT:%.*]] = shl nuw nsw i64 [[VSCALE]], 2
+; CHECK-NEXT: [[REM:%.*]] = urem i64 1024, [[SHIFT]]
+; CHECK-NEXT: ret i64 [[REM]]
+;
+ %vscale = call i64 @llvm.vscale.i64()
+ %shift = shl nuw nsw i64 %vscale, 2
+ %rem = urem i64 1024, %shift
+ ret i64 %rem
+}
+
+define i64 @urem_vscale_range() vscale_range(1,16) {
+; CHECK-LABEL: @urem_vscale_range(
+; CHECK-NEXT: [[VSCALE:%.*]] = call i64 @llvm.vscale.i64()
+; CHECK-NEXT: [[SHIFT:%.*]] = shl nuw nsw i64 [[VSCALE]], 2
+; CHECK-NEXT: [[REM:%.*]] = urem i64 1024, [[SHIFT]]
+; CHECK-NEXT: ret i64 [[REM]]
+;
+ %vscale = call i64 @llvm.vscale.i64()
+ %shift = shl nuw nsw i64 %vscale, 2
+ %rem = urem i64 1024, %shift
+ ret i64 %rem
+}
+
+define i64 @urem_shl_vscale_out_of_range() vscale_range(1,16) {
+; CHECK-LABEL: @urem_shl_vscale_out_of_range(
+; CHECK-NEXT: [[VSCALE:%.*]] = call i64 @llvm.vscale.i64()
+; CHECK-NEXT: [[SHIFT:%.*]] = shl nuw nsw i64 [[VSCALE]], 20
+; CHECK-NEXT: [[REM:%.*]] = urem i64 1024, [[SHIFT]]
+; CHECK-NEXT: ret i64 [[REM]]
+;
+ %vscale = call i64 @llvm.vscale.i64()
+ %shift = shl nuw nsw i64 %vscale, 20
+ %rem = urem i64 1024, %shift
+ ret i64 %rem
+}