(match_operand:QI 0 "nonimmediate_operand" "QBc,m")
(subreg:QI
(zero_extract:SWI248
- (match_operand:SWI248 1 "register_operand" "Q,Q")
+ (match_operand 1 "int248_register_operand" "Q,Q")
(const_int 8)
(const_int 8)) 0)))]
"ix86_match_ccmode (insn, CCmode)"
(compare
(subreg:QI
(zero_extract:SWI248
- (match_operand:SWI248 0 "register_operand" "Q")
+ (match_operand 0 "int248_register_operand" "Q")
(const_int 8)
(const_int 8)) 0)
(match_operand:QI 1 "const0_operand")))]
(compare
(subreg:QI
(zero_extract:SWI248
- (match_operand:SWI248 0 "register_operand" "Q,Q")
+ (match_operand 0 "int248_register_operand" "Q,Q")
(const_int 8)
(const_int 8)) 0)
(match_operand:QI 1 "general_operand" "QnBc,m")))]
(compare
(subreg:QI
(zero_extract:SWI248
- (match_operand:SWI248 0 "register_operand" "Q")
+ (match_operand 0 "int248_register_operand" "Q")
(const_int 8)
(const_int 8)) 0)
(subreg:QI
(zero_extract:SWI248
- (match_operand:SWI248 1 "register_operand" "Q")
+ (match_operand 1 "int248_register_operand" "Q")
(const_int 8)
(const_int 8)) 0)))]
"ix86_match_ccmode (insn, CCmode)"
[(set (match_operand:QI 0 "norex_memory_operand" "=Bn")
(subreg:QI
(zero_extract:SWI248
- (match_operand:SWI248 1 "register_operand" "Q")
+ (match_operand 1 "int248_register_operand" "Q")
(const_int 8)
(const_int 8)) 0))]
"TARGET_64BIT && reload_completed"
[(set (match_operand:QI 0 "nonimmediate_operand" "=QBc,?R,m")
(subreg:QI
(zero_extract:SWI248
- (match_operand:SWI248 1 "register_operand" "Q,Q,Q")
+ (match_operand 1 "int248_register_operand" "Q,Q,Q")
(const_int 8)
(const_int 8)) 0))]
""
(define_peephole2
[(set (match_operand:QI 0 "register_operand")
(subreg:QI
- (zero_extract:SWI248 (match_operand:SWI248 1 "register_operand")
+ (zero_extract:SWI248 (match_operand 1 "int248_register_operand")
(const_int 8)
(const_int 8)) 0))
(set (match_operand:QI 2 "norex_memory_operand") (match_dup 0))]
(define_insn "*insvqi_1_mem_rex64"
[(set (zero_extract:SWI248
- (match_operand:SWI248 0 "register_operand" "+Q")
+ (match_operand 0 "int248_register_operand" "+Q")
(const_int 8)
(const_int 8))
(subreg:SWI248
(define_insn "@insv<mode>_1"
[(set (zero_extract:SWI248
- (match_operand:SWI248 0 "register_operand" "+Q,Q")
+ (match_operand 0 "int248_register_operand" "+Q,Q")
(const_int 8)
(const_int 8))
(match_operand:SWI248 1 "general_operand" "QnBc,m"))]
(define_insn "*insvqi_1"
[(set (zero_extract:SWI248
- (match_operand:SWI248 0 "register_operand" "+Q,Q")
+ (match_operand 0 "int248_register_operand" "+Q,Q")
(const_int 8)
(const_int 8))
(subreg:SWI248
(define_peephole2
[(set (match_operand:QI 0 "register_operand")
(match_operand:QI 1 "norex_memory_operand"))
- (set (zero_extract:SWI248 (match_operand:SWI248 2 "register_operand")
+ (set (zero_extract:SWI248 (match_operand 2 "int248_register_operand")
(const_int 8)
(const_int 8))
(subreg:SWI248 (match_dup 0) 0))]
[(parallel [(set (match_operand:SWI48 0 "general_reg_operand")
(const_int 0))
(clobber (reg:CC FLAGS_REG))])
- (set (zero_extract:SWI248 (match_operand:SWI248 1 "general_reg_operand")
+ (set (zero_extract:SWI248 (match_operand 1 "int248_register_operand")
(const_int 8)
(const_int 8))
(const_int 0))]
(define_peephole2
[(set (match_operand:SWI48 0 "general_reg_operand")
(match_operand:SWI48 1 "const_int_operand"))
- (set (zero_extract:SWI248 (match_operand:SWI248 2 "general_reg_operand")
+ (set (zero_extract:SWI248 (match_operand 2 "int248_register_operand")
(const_int 8)
(const_int 8))
(match_operand:SWI248 3 "const_int_operand"))]
(define_insn "*insvqi_2"
[(set (zero_extract:SWI248
- (match_operand:SWI248 0 "register_operand" "+Q")
+ (match_operand 0 "int248_register_operand" "+Q")
(const_int 8)
(const_int 8))
(any_extract:SWI248
- (match_operand:SWI248 1 "register_operand" "Q")
+ (match_operand 1 "int248_register_operand" "Q")
(const_int 8)
(const_int 8)))]
""
(define_insn "*insvqi_3"
[(set (zero_extract:SWI248
- (match_operand:SWI248 0 "register_operand" "+Q")
+ (match_operand 0 "int248_register_operand" "+Q")
(const_int 8)
(const_int 8))
(any_shiftrt:SWI248
(sign_extend:SWI24
(subreg:QI
(zero_extract:SWI248
- (match_operand:SWI248 1 "register_operand" "Q")
+ (match_operand 1 "int248_register_operand" "Q")
(const_int 8)
(const_int 8)) 0)))]
""
(define_insn "*addqi_ext<mode>_1"
[(set (zero_extract:SWI248
- (match_operand:SWI248 0 "register_operand" "+Q,Q")
+ (match_operand 0 "int248_register_operand" "+Q,Q")
(const_int 8)
(const_int 8))
(subreg:SWI248
(plus:QI
(subreg:QI
(zero_extract:SWI248
- (match_operand:SWI248 1 "register_operand" "0,0")
+ (match_operand 1 "int248_register_operand" "0,0")
(const_int 8)
(const_int 8)) 0)
(match_operand:QI 2 "general_operand" "QnBc,m")) 0))
(define_insn "*addqi_ext<mode>_2"
[(set (zero_extract:SWI248
- (match_operand:SWI248 0 "register_operand" "+Q")
+ (match_operand 0 "int248_register_operand" "+Q")
(const_int 8)
(const_int 8))
(subreg:SWI248
(plus:QI
(subreg:QI
(zero_extract:SWI248
- (match_operand:SWI248 1 "register_operand" "%0")
+ (match_operand 1 "int248_register_operand" "%0")
(const_int 8)
(const_int 8)) 0)
(subreg:QI
(zero_extract:SWI248
- (match_operand:SWI248 2 "register_operand" "Q")
+ (match_operand 2 "int248_register_operand" "Q")
(const_int 8)
(const_int 8)) 0)) 0))
(clobber (reg:CC FLAGS_REG))]
(define_insn "*subqi_ext<mode>_2"
[(set (zero_extract:SWI248
- (match_operand:SWI248 0 "register_operand" "+Q")
+ (match_operand 0 "int248_register_operand" "+Q")
(const_int 8)
(const_int 8))
(subreg:SWI248
(minus:QI
(subreg:QI
(zero_extract:SWI248
- (match_operand:SWI248 1 "register_operand" "0")
+ (match_operand 1 "int248_register_operand" "0")
(const_int 8)
(const_int 8)) 0)
(subreg:QI
(zero_extract:SWI248
- (match_operand:SWI248 2 "register_operand" "Q")
+ (match_operand 2 "int248_register_operand" "Q")
(const_int 8)
(const_int 8)) 0)) 0))
(clobber (reg:CC FLAGS_REG))]
(and:QI
(subreg:QI
(zero_extract:SWI248
- (match_operand:SWI248 0 "register_operand" "Q,Q")
+ (match_operand 0 "int248_register_operand" "Q,Q")
(const_int 8)
(const_int 8)) 0)
(match_operand:QI 1 "general_operand" "QnBc,m"))
(and:QI
(subreg:QI
(zero_extract:SWI248
- (match_operand:SWI248 0 "register_operand" "Q")
+ (match_operand 0 "int248_register_operand" "Q")
(const_int 8)
(const_int 8)) 0)
(subreg:QI
(zero_extract:SWI248
- (match_operand:SWI248 1 "register_operand" "Q")
+ (match_operand 1 "int248_register_operand" "Q")
(const_int 8)
(const_int 8)) 0))
(const_int 0)))]
(match_op_dup 1
[(and:QI
(subreg:QI
- (zero_extract:SI (match_dup 2)
+ (zero_extract:HI (match_dup 2)
(const_int 8)
(const_int 8)) 0)
(match_dup 3))
(const_int 0)]))]
{
- operands[2] = gen_lowpart (SImode, operands[2]);
+ operands[2] = gen_lowpart (HImode, operands[2]);
operands[3] = gen_int_mode (INTVAL (operands[3]) >> 8, QImode);
})
"(!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun))
&& reload_completed"
[(parallel
- [(set (zero_extract:SI (match_dup 0)
+ [(set (zero_extract:HI (match_dup 0)
(const_int 8)
(const_int 8))
- (subreg:SI
+ (subreg:HI
(xor:QI
(subreg:QI
- (zero_extract:SI (match_dup 0)
+ (zero_extract:HI (match_dup 0)
(const_int 8)
(const_int 8)) 0)
(subreg:QI
- (zero_extract:SI (match_dup 0)
+ (zero_extract:HI (match_dup 0)
(const_int 8)
(const_int 8)) 0)) 0))
(clobber (reg:CC FLAGS_REG))])]
- "operands[0] = gen_lowpart (SImode, operands[0]);")
+ "operands[0] = gen_lowpart (HImode, operands[0]);")
(define_insn "*anddi_2"
[(set (reg FLAGS_REG)
(define_insn "*andqi_ext<mode>_1"
[(set (zero_extract:SWI248
- (match_operand:SWI248 0 "register_operand" "+Q,Q")
+ (match_operand 0 "int248_register_operand" "+Q,Q")
(const_int 8)
(const_int 8))
(subreg:SWI248
(and:QI
(subreg:QI
(zero_extract:SWI248
- (match_operand:SWI248 1 "register_operand" "0,0")
+ (match_operand 1 "int248_register_operand" "0,0")
(const_int 8)
(const_int 8)) 0)
(match_operand:QI 2 "general_operand" "QnBc,m")) 0))
(and:QI
(subreg:QI
(zero_extract:SWI248
- (match_operand:SWI248 1 "register_operand" "0,0")
+ (match_operand 1 "int248_register_operand" "0,0")
(const_int 8)
(const_int 8)) 0)
(match_operand:QI 2 "general_operand" "QnBc,m"))
(const_int 0)))
(set (zero_extract:SWI248
- (match_operand:SWI248 0 "register_operand" "+Q,Q")
+ (match_operand 0 "int248_register_operand" "+Q,Q")
(const_int 8)
(const_int 8))
(subreg:SWI248
(define_insn "*andqi_ext<mode>_2"
[(set (zero_extract:SWI248
- (match_operand:SWI248 0 "register_operand" "+Q")
+ (match_operand 0 "int248_register_operand" "+Q")
(const_int 8)
(const_int 8))
(subreg:SWI248
(and:QI
(subreg:QI
(zero_extract:SWI248
- (match_operand:SWI248 1 "register_operand" "%0")
+ (match_operand 1 "int248_register_operand" "%0")
(const_int 8)
(const_int 8)) 0)
(subreg:QI
(zero_extract:SWI248
- (match_operand:SWI248 2 "register_operand" "Q")
+ (match_operand 2 "int248_register_operand" "Q")
(const_int 8)
(const_int 8)) 0)) 0))
(clobber (reg:CC FLAGS_REG))]
&& (!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun))
&& !(~INTVAL (operands[2]) & ~(255 << 8))"
[(parallel
- [(set (zero_extract:SI (match_dup 0)
+ [(set (zero_extract:HI (match_dup 0)
(const_int 8)
(const_int 8))
- (subreg:SI
+ (subreg:HI
(and:QI
(subreg:QI
- (zero_extract:SI (match_dup 1)
+ (zero_extract:HI (match_dup 1)
(const_int 8)
(const_int 8)) 0)
(match_dup 2)) 0))
(clobber (reg:CC FLAGS_REG))])]
{
- operands[0] = gen_lowpart (SImode, operands[0]);
- operands[1] = gen_lowpart (SImode, operands[1]);
+ operands[0] = gen_lowpart (HImode, operands[0]);
+ operands[1] = gen_lowpart (HImode, operands[1]);
operands[2] = gen_int_mode (INTVAL (operands[2]) >> 8, QImode);
})
(define_insn "*<code>qi_ext<mode>_1"
[(set (zero_extract:SWI248
- (match_operand:SWI248 0 "register_operand" "+Q,Q")
+ (match_operand 0 "int248_register_operand" "+Q,Q")
(const_int 8)
(const_int 8))
(subreg:SWI248
(any_or:QI
(subreg:QI
(zero_extract:SWI248
- (match_operand:SWI248 1 "register_operand" "0,0")
+ (match_operand 1 "int248_register_operand" "0,0")
(const_int 8)
(const_int 8)) 0)
(match_operand:QI 2 "general_operand" "QnBc,m")) 0))
(define_insn "*<code>qi_ext<mode>_2"
[(set (zero_extract:SWI248
- (match_operand:SWI248 0 "register_operand" "+Q")
+ (match_operand 0 "int248_register_operand" "+Q")
(const_int 8)
(const_int 8))
(subreg:SWI248
(any_or:QI
(subreg:QI
(zero_extract:SWI248
- (match_operand:SWI248 1 "register_operand" "%0")
+ (match_operand 1 "int248_register_operand" "%0")
(const_int 8)
(const_int 8)) 0)
(subreg:QI
(zero_extract:SWI248
- (match_operand:SWI248 2 "register_operand" "Q")
+ (match_operand 2 "int248_register_operand" "Q")
(const_int 8)
(const_int 8)) 0)) 0))
(clobber (reg:CC FLAGS_REG))]
&& (!TARGET_PARTIAL_REG_STALL || optimize_function_for_size_p (cfun))
&& !(INTVAL (operands[2]) & ~(255 << 8))"
[(parallel
- [(set (zero_extract:SI (match_dup 0)
+ [(set (zero_extract:HI (match_dup 0)
(const_int 8)
(const_int 8))
- (subreg:SI
+ (subreg:HI
(any_or:QI
(subreg:QI
- (zero_extract:SI (match_dup 1)
+ (zero_extract:HI (match_dup 1)
(const_int 8)
(const_int 8)) 0)
(match_dup 2)) 0))
emit_note (NOTE_INSN_DELETED);
DONE;
}
- operands[0] = gen_lowpart (SImode, operands[0]);
- operands[1] = gen_lowpart (SImode, operands[1]);
+ operands[0] = gen_lowpart (HImode, operands[0]);
+ operands[1] = gen_lowpart (HImode, operands[1]);
operands[2] = gen_int_mode (INTVAL (operands[2]) >> 8, QImode);
})
(xor:QI
(subreg:QI
(zero_extract:SWI248
- (match_operand:SWI248 1 "register_operand" "0,0")
+ (match_operand 1 "int248_register_operand" "0,0")
(const_int 8)
(const_int 8)) 0)
(match_operand:QI 2 "general_operand" "QnBc,m"))
(const_int 0)))
(set (zero_extract:SWI248
- (match_operand:SWI248 0 "register_operand" "+Q,Q")
+ (match_operand 0 "int248_register_operand" "+Q,Q")
(const_int 8)
(const_int 8))
(subreg:SWI248
(define_insn "*negqi_ext<mode>_2"
[(set (zero_extract:SWI248
- (match_operand:SWI248 0 "register_operand" "+Q")
+ (match_operand 0 "int248_register_operand" "+Q")
(const_int 8)
(const_int 8))
(subreg:SWI248
(neg:QI
(subreg:QI
(zero_extract:SWI248
- (match_operand:SWI248 1 "register_operand" "0")
+ (match_operand 1 "int248_register_operand" "0")
(const_int 8)
(const_int 8)) 0)) 0))
(clobber (reg:CC FLAGS_REG))]
(define_insn "*ashlqi_ext<mode>_2"
[(set (zero_extract:SWI248
- (match_operand:SWI248 0 "register_operand" "+Q")
+ (match_operand 0 "int248_register_operand" "+Q")
(const_int 8)
(const_int 8))
(subreg:SWI248
(ashift:QI
(subreg:QI
(zero_extract:SWI248
- (match_operand:SWI248 1 "register_operand" "0")
+ (match_operand 1 "int248_register_operand" "0")
(const_int 8)
(const_int 8)) 0)
(match_operand:QI 2 "nonmemory_operand" "cI")) 0))
(define_insn "*<insn>qi_ext<mode>_2"
[(set (zero_extract:SWI248
- (match_operand:SWI248 0 "register_operand" "+Q")
+ (match_operand 0 "int248_register_operand" "+Q")
(const_int 8)
(const_int 8))
(subreg:SWI248
(any_shiftrt:QI
(subreg:QI
(zero_extract:SWI248
- (match_operand:SWI248 1 "register_operand" "0")
+ (match_operand 1 "int248_register_operand" "0")
(const_int 8)
(const_int 8)) 0)
(match_operand:QI 2 "nonmemory_operand" "cI")) 0))
(match_operator 1 "compare_operator"
[(and:QI
(subreg:QI
- (zero_extract:SWI248 (match_operand:SWI248 2 "QIreg_operand")
+ (zero_extract:SWI248 (match_operand 2 "int248_register_operand")
(const_int 8)
(const_int 8)) 0)
(match_operand 3 "const_int_operand"))