arm64: dts: qcom: sm8350-hdk: Add QMP & DP to SuperSpeed graph

With support for the QMP combo phy to react to USB Type-C switch events,
introduce it as the next hop for the SuperSpeed lanes of the Type-C
connector, and connect the output of the DisplayPort controller
to the QMP combo phy.

This allows the TCPM to perform orientation switching of both USB and
DisplayPort signals.

Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Signed-off-by: Neil Armstrong <neil.armstrong@linaro.org>
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Link: https://lore.kernel.org/r/20230503-topic-sm8450-graphics-dp-next-v3-3-6c43d293995f@linaro.org

diff --git a/arch/arm64/boot/dts/qcom/sm8350-hdk.dts b/arch/arm64/boot/dts/qcom/sm8350-hdk.dts
index 2ee1b12..d3788bd 100644 (file)
--- a/arch/arm64/boot/dts/qcom/sm8350-hdk.dts
+++ b/arch/arm64/boot/dts/qcom/sm8350-hdk.dts
@@ -58,7 +58,15 @@
                                        reg = <1>;
 
                                        pmic_glink_ss_in: endpoint {
-                                               remote-endpoint = <&usb_1_dwc3_ss>;
+                                               remote-endpoint = <&usb_1_qmpphy_out>;
+                                       };
+                               };
+
+                               port@2 {
+                                       reg = <2>;
+
+                                       pmic_glink_sbu: endpoint {
+                                               remote-endpoint = <&fsa4480_sbu_mux>;
                                        };
                                };
                        };
@@ -326,6 +334,37 @@
        };
 };
 
+&i2c13 {
+       clock-frequency = <100000>;
+
+       status = "okay";
+
+       typec-mux@42 {
+               compatible = "fcs,fsa4480";
+               reg = <0x42>;
+
+               interrupts-extended = <&tlmm 2 IRQ_TYPE_LEVEL_LOW>;
+
+               vcc-supply = <&vreg_bob>;
+               mode-switch;
+               orientation-switch;
+               svid = /bits/ 16 <0xff01>;
+
+               ports {
+                       #address-cells = <1>;
+                       #size-cells = <0>;
+
+                       port@0 {
+                               reg = <0>;
+
+                               fsa4480_sbu_mux: endpoint {
+                                       remote-endpoint = <&pmic_glink_sbu>;
+                               };
+                       };
+               };
+       };
+};
+
 &i2c15 {
        clock-frequency = <400000>;
        status = "okay";
@@ -370,6 +409,21 @@
        status = "okay";
 };
 
+&mdss_dp {
+       status = "okay";
+
+       ports {
+               port@1 {
+                       reg = <1>;
+
+                       mdss_dp0_out: endpoint {
+                               data-lanes = <0 1>;
+                               remote-endpoint = <&usb_1_qmpphy_dp_in>;
+                       };
+               };
+       };
+};
+
 &mdss_mdp {
        status = "okay";
 };
@@ -416,6 +470,10 @@
        status = "okay";
 };
 
+&qupv3_id_1 {
+       status = "okay";
+};
+
 &qupv3_id_2 {
        status = "okay";
 };
@@ -716,7 +774,7 @@
 };
 
 &usb_1_dwc3_ss {
-       remote-endpoint = <&pmic_glink_ss_in>;
+       remote-endpoint = <&usb_1_qmpphy_usb_ss_in>;
 };
 
 &usb_1_hsphy {
@@ -732,6 +790,20 @@
 
        vdda-phy-supply = <&vreg_l6b_1p2>;
        vdda-pll-supply = <&vreg_l1b_0p88>;
+
+       orientation-switch;
+};
+
+&usb_1_qmpphy_dp_in {
+       remote-endpoint = <&mdss_dp0_out>;
+};
+
+&usb_1_qmpphy_out {
+       remote-endpoint = <&pmic_glink_ss_in>;
+};
+
+&usb_1_qmpphy_usb_ss_in {
+       remote-endpoint = <&usb_1_dwc3_ss>;
 };
 
 &usb_2 {