(MASK_AUTO_INC_DEC, MASK_M6811, MASK_M6812, MASK_M68S12)
(MASK_NO_DIRECT_MODE, MASK_MIN_MAX, MASK_LONG_CALLS)
(TARGET_SHORT, TARGET_M6811, TARGET_M6812, TARGET_M68S12)
(TARGET_AUTO_INC_DEC, TARGET_MIN_MAX, TARGET_NO_DIRECT_MODE)
(TARGET_LONG_CALLS, TARGET_SWITCHES, TARGET_OPTIONS)
(SUBTARGET_SWITCHES, SUBTARGET_OPTIONS, m68hc11_regparm_string)
(m68hc11_reg_alloc_order, m68hc11_soft_reg_count)
(TARGET_M68HC11): Delete.
(TARGET_DEFAULT): Change the default setting from MASK_M6811 to 0.
* config/m68hc11/m68hc12.h (TARGET_M68HC12): Delete.
* config/m68hc11/m68hc11.c (m68hc11_regparm_string)
(m68hc11_reg_alloc_order, m68hc11_soft_reg_count)
(nb_soft_regs): Delete.
(TARGET_DEFAULT_TARGET_FLAGS): Override default with TARGET_DEFAULT.
(m68hc11_override_options): Remove the code that caters for MASK_M6811
and MASK_M6812 being set simultaneously. Change the code that sets
the default m68hc11_soft_reg_count to use integers instead of strings.
(m68hc11_conditional_register_usage, hard_regno_mode_ok): Use
m68hc11_soft_reg_count (which now has an int type) as the number
of soft registers.
* config/m68hc11/m68hc11.opt: New file.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@97458
138bc75d-0d04-0410-961f-
82ee72b054a4
+2005-04-02 Richard Sandiford <rsandifo@redhat.com>
+
+ * config/m68hc11/m68hc11.h (target_flags, MASK_SHORT)
+ (MASK_AUTO_INC_DEC, MASK_M6811, MASK_M6812, MASK_M68S12)
+ (MASK_NO_DIRECT_MODE, MASK_MIN_MAX, MASK_LONG_CALLS)
+ (TARGET_SHORT, TARGET_M6811, TARGET_M6812, TARGET_M68S12)
+ (TARGET_AUTO_INC_DEC, TARGET_MIN_MAX, TARGET_NO_DIRECT_MODE)
+ (TARGET_LONG_CALLS, TARGET_SWITCHES, TARGET_OPTIONS)
+ (SUBTARGET_SWITCHES, SUBTARGET_OPTIONS, m68hc11_regparm_string)
+ (m68hc11_reg_alloc_order, m68hc11_soft_reg_count)
+ (TARGET_M68HC11): Delete.
+ (TARGET_DEFAULT): Change the default setting from MASK_M6811 to 0.
+ * config/m68hc11/m68hc12.h (TARGET_M68HC12): Delete.
+ * config/m68hc11/m68hc11.c (m68hc11_regparm_string)
+ (m68hc11_reg_alloc_order, m68hc11_soft_reg_count)
+ (nb_soft_regs): Delete.
+ (TARGET_DEFAULT_TARGET_FLAGS): Override default with TARGET_DEFAULT.
+ (m68hc11_override_options): Remove the code that caters for MASK_M6811
+ and MASK_M6812 being set simultaneously. Change the code that sets
+ the default m68hc11_soft_reg_count to use integers instead of strings.
+ (m68hc11_conditional_register_usage, hard_regno_mode_ok): Use
+ m68hc11_soft_reg_count (which now has an int type) as the number
+ of soft registers.
+ * config/m68hc11/m68hc11.opt: New file.
+
2005-04-02 Kazu Hirata <kazu@cs.umass.edu>
* config/fr30/fr30.h (PREDICATE_CODES): Remove
/* divSI */
COSTS_N_INSNS (100)
};
-
-/* Machine specific options */
-
-const char *m68hc11_regparm_string;
-const char *m68hc11_reg_alloc_order;
-const char *m68hc11_soft_reg_count;
-
-static int nb_soft_regs;
\f
/* Initialize the GCC target structure. */
#undef TARGET_ATTRIBUTE_TABLE
#undef TARGET_ASM_FILE_START_FILE_DIRECTIVE
#define TARGET_ASM_FILE_START_FILE_DIRECTIVE true
+#undef TARGET_DEFAULT_TARGET_FLAGS
+#define TARGET_DEFAULT_TARGET_FLAGS TARGET_DEFAULT
+
#undef TARGET_ENCODE_SECTION_INFO
#define TARGET_ENCODE_SECTION_INFO m68hc11_encode_section_info
/* Configure for a 68hc11 processor. */
if (TARGET_M6811)
{
- /* If gcc was built for a 68hc12, invalidate that because
- a -m68hc11 option was specified on the command line. */
- if (TARGET_DEFAULT != MASK_M6811)
- target_flags &= ~TARGET_DEFAULT;
-
- if (!TARGET_M6812)
- target_flags &= ~(TARGET_AUTO_INC_DEC | TARGET_MIN_MAX);
+ target_flags &= ~(TARGET_AUTO_INC_DEC | TARGET_MIN_MAX);
m68hc11_cost = &m6811_cost;
m68hc11_min_offset = 0;
m68hc11_max_offset = 256;
m68hc11_tmp_regs_class = D_REGS;
m68hc11_addr_mode = ADDR_OFFSET;
m68hc11_mov_addr_mode = 0;
- if (m68hc11_soft_reg_count == 0 && !TARGET_M6812)
- m68hc11_soft_reg_count = "4";
+ if (m68hc11_soft_reg_count < 0)
+ m68hc11_soft_reg_count = 4;
}
/* Configure for a 68hc12 processor. */
| (TARGET_AUTO_INC_DEC ? ADDR_INCDEC : 0);
m68hc11_mov_addr_mode = ADDR_OFFSET | ADDR_CONST
| (TARGET_AUTO_INC_DEC ? ADDR_INCDEC : 0);
- target_flags &= ~MASK_M6811;
target_flags |= MASK_NO_DIRECT_MODE;
- if (m68hc11_soft_reg_count == 0)
- m68hc11_soft_reg_count = "0";
+ if (m68hc11_soft_reg_count < 0)
+ m68hc11_soft_reg_count = 0;
if (TARGET_LONG_CALLS)
current_function_far = 1;
m68hc11_conditional_register_usage (void)
{
int i;
- int cnt = atoi (m68hc11_soft_reg_count);
- if (cnt < 0)
- cnt = 0;
- if (cnt > SOFT_REG_LAST - SOFT_REG_FIRST)
- cnt = SOFT_REG_LAST - SOFT_REG_FIRST;
+ if (m68hc11_soft_reg_count > SOFT_REG_LAST - SOFT_REG_FIRST)
+ m68hc11_soft_reg_count = SOFT_REG_LAST - SOFT_REG_FIRST;
- nb_soft_regs = cnt;
- for (i = SOFT_REG_FIRST + cnt; i < SOFT_REG_LAST; i++)
+ for (i = SOFT_REG_FIRST + m68hc11_soft_reg_count; i < SOFT_REG_LAST; i++)
{
fixed_regs[i] = 1;
call_used_regs[i] = 1;
switch (GET_MODE_SIZE (mode))
{
case 8:
- return S_REGNO_P (regno) && nb_soft_regs >= 4;
+ return S_REGNO_P (regno) && m68hc11_soft_reg_count >= 4;
case 4:
- return X_REGNO_P (regno) || (S_REGNO_P (regno) && nb_soft_regs >= 2);
+ return (X_REGNO_P (regno)
+ || (S_REGNO_P (regno) && m68hc11_soft_reg_count >= 2));
case 2:
return G_REGNO_P (regno);
/* Run-time compilation parameters selecting different hardware subsets. */
-extern int target_flags;
-
extern short *reg_renumber; /* def in local_alloc.c */
-/* Macros used in the machine description to test the flags. */
-
-/* 6811 specific options
- *
- * For 68HC12, the auto inc/dec mode is disabled by default. The reason
- * is that for most programs, the reload pass will fail because it needs
- * more registers to save the value of the indexed register after the
- * memory access. For simple programs, you can enable this
- * with -mauto-incdec.
- */
-
-#define MASK_SHORT 0002 /* Compile with 16-bit `int' */
-#define MASK_AUTO_INC_DEC 0004
-#define MASK_M6811 0010
-#define MASK_M6812 0020
-#define MASK_M68S12 0040
-#define MASK_NO_DIRECT_MODE 0100
-#define MASK_MIN_MAX 0200
-#define MASK_LONG_CALLS 0400
-
#define TARGET_OP_TIME (optimize && optimize_size == 0)
-#define TARGET_SHORT (target_flags & MASK_SHORT)
-#define TARGET_M6811 (target_flags & MASK_M6811)
-#define TARGET_M6812 (target_flags & MASK_M6812)
-#define TARGET_M68S12 (target_flags & MASK_M68S12)
-#define TARGET_AUTO_INC_DEC (target_flags & MASK_AUTO_INC_DEC)
-#define TARGET_MIN_MAX (target_flags & MASK_MIN_MAX)
-#define TARGET_NO_DIRECT_MODE (target_flags & MASK_NO_DIRECT_MODE)
#define TARGET_RELAX (TARGET_NO_DIRECT_MODE)
-#define TARGET_LONG_CALLS (target_flags & MASK_LONG_CALLS)
/* Default target_flags if no switches specified. */
#ifndef TARGET_DEFAULT
-# define TARGET_DEFAULT (MASK_M6811)
+# define TARGET_DEFAULT 0
#endif
/* Define this macro as a C expression for the initializer of an
# endif
#endif
-/* Macro to define tables used to set the flags. This is a list in braces of
- pairs in braces, each pair being { "NAME", VALUE } where VALUE is the bits
- to set or minus the bits to clear. An empty string NAME is used to
- identify the default VALUE. */
-
-#define TARGET_SWITCHES \
-{ { "short", MASK_SHORT, \
- N_("Compile with 16-bit integer mode")}, \
- { "noshort", - MASK_SHORT, \
- N_("Compile with 32-bit integer mode")}, \
- { "auto-incdec", MASK_AUTO_INC_DEC, \
- N_("Auto pre/post decrement increment allowed")}, \
- { "noauto-incdec", - MASK_AUTO_INC_DEC, \
- N_("Auto pre/post decrement increment not allowed")}, \
- { "inmax", MASK_MIN_MAX, \
- N_("Min/max instructions allowed")}, \
- { "nominmax", - MASK_MIN_MAX, \
- N_("Min/max instructions not allowed")}, \
- { "long-calls", MASK_LONG_CALLS, \
- N_("Use call and rtc for function calls and returns")}, \
- { "nolong-calls", - MASK_LONG_CALLS, \
- N_("Use jsr and rts for function calls and returns")}, \
- { "relax", MASK_NO_DIRECT_MODE, \
- N_("Do not use direct addressing mode for soft registers")},\
- { "norelax", -MASK_NO_DIRECT_MODE, \
- N_("Use direct addressing mode for soft registers")}, \
- { "68hc11", MASK_M6811, \
- N_("Compile for a 68HC11")}, \
- { "68hc12", MASK_M6812, \
- N_("Compile for a 68HC12")}, \
- { "68hcs12", MASK_M6812 | MASK_M68S12, \
- N_("Compile for a 68HCS12")}, \
- { "6811", MASK_M6811, \
- N_("Compile for a 68HC11")}, \
- { "6812", MASK_M6812, \
- N_("Compile for a 68HC12")}, \
- { "68S12", MASK_M6812 | MASK_M68S12, \
- N_("Compile for a 68HCS12")}, \
- { "", TARGET_DEFAULT, 0 }}
-
-/* This macro is similar to `TARGET_SWITCHES' but defines names of
- command options that have values. Its definition is an
- initializer with a subgrouping for each command option.
-
- Each subgrouping contains a string constant, that defines the
- fixed part of the option name, and the address of a variable. The
- variable, type `char *', is set to the variable part of the given
- option if the fixed part matches. The actual option name is made
- by appending `-m' to the specified name. */
-#define TARGET_OPTIONS \
-{ { "reg-alloc=", &m68hc11_reg_alloc_order, \
- N_("Specify the register allocation order"), 0}, \
- { "soft-reg-count=", &m68hc11_soft_reg_count, \
- N_("Indicate the number of soft registers available"), 0}, \
- SUBTARGET_OPTIONS \
-}
-
-/* These are meant to be redefined in the host dependent files */
-#define SUBTARGET_SWITCHES
-#define SUBTARGET_OPTIONS
-
-extern const char *m68hc11_regparm_string;
-extern const char *m68hc11_reg_alloc_order;
-extern const char *m68hc11_soft_reg_count;
-
-#ifndef TARGET_M68HC12
-# define TARGET_M68HC11 1
-#endif
-
/* Print subsidiary information on the compiler version in use. */
#define TARGET_VERSION fprintf (stderr, " (MC68HC11/MC68HC12/MC68HCS12)")
--- /dev/null
+; Options for the Motorola 68HC11 and 68HC12 port of the compiler.
+
+; Copyright (C) 2005 Free Software Foundation, Inc.
+;
+; This file is part of GCC.
+;
+; GCC is free software; you can redistribute it and/or modify it under
+; the terms of the GNU General Public License as published by the Free
+; Software Foundation; either version 2, or (at your option) any later
+; version.
+;
+; GCC is distributed in the hope that it will be useful, but WITHOUT ANY
+; WARRANTY; without even the implied warranty of MERCHANTABILITY or
+; FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
+; for more details.
+;
+; You should have received a copy of the GNU General Public License
+; along with GCC; see the file COPYING. If not, write to the Free
+; Software Foundation, 59 Temple Place - Suite 330, Boston, MA
+; 02111-1307, USA.
+
+m6811
+Target RejectNegative InverseMask(M6812, M6811)
+Compile for a 68HC11
+
+m6812
+Target RejectNegative Mask(M6812)
+Compile for a 68HC12
+
+m68hc11
+Target RejectNegative InverseMask(M6812)
+Compile for a 68HC11
+
+m68hc12
+Target RejectNegative Mask(M6812) MaskExists
+Compile for a 68HC12
+
+; At the moment, there is no difference between the code generated
+; for -m68hc12 and -m68hcs12.
+m68hcs12
+Target RejectNegative Mask(M6812) MaskExists
+Compile for a 68HCS12
+
+m68s12
+Target RejectNegative Mask(M6812) MaskExists
+Compile for a 68HCS12
+
+mauto-incdec
+Target RejectNegative Report Mask(AUTO_INC_DEC)
+Auto pre/post decrement increment allowed
+
+minmax
+Target RejectNegative Report Mask(MIN_MAX)
+Min/max instructions allowed
+
+mlong-calls
+Target RejectNegative Report Mask(LONG_CALLS)
+Use call and rtc for function calls and returns
+
+mnoauto-incdec
+Target RejectNegative Report InverseMask(AUTO_INC_DEC)
+Auto pre/post decrement increment not allowed
+
+mnolong-calls
+Target RejectNegative Report InverseMask(LONG_CALLS)
+Use jsr and rts for function calls and returns
+
+mnominmax
+Target RejectNegative Report InverseMask(MIN_MAX)
+Min/max instructions not allowed
+
+mnorelax
+Target RejectNegative Report InverseMask(NO_DIRECT_MODE)
+Use direct addressing mode for soft registers
+
+mnoshort
+Target RejectNegative Report InverseMask(SHORT)
+Compile with 32-bit integer mode
+
+; Currently ignored.
+mreg-alloc=
+Target RejectNegative Joined
+Specify the register allocation order
+
+mrelax
+Target RejectNegative Report Mask(NO_DIRECT_MODE)
+Do not use direct addressing mode for soft registers
+
+mshort
+Target RejectNegative Report Mask(SHORT)
+Compile with 16-bit integer mode
+
+msoft-reg-count=
+Target RejectNegative Joined UInteger Var(m68hc11_soft_reg_count) Init(-1)
+Indicate the number of soft registers available
/* Default target_flags if no switches specified. */
#define TARGET_DEFAULT (MASK_M6812)
-
-#define TARGET_M68HC12
projects / platform / upstream / linaro-gcc.git / commitdiff