drm/amdgpu: move amdgpu_num_kcq handling to a helper
authorAlex Deucher <alexander.deucher@amd.com>
Fri, 16 Oct 2020 14:02:56 +0000 (10:02 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Fri, 16 Oct 2020 19:11:17 +0000 (15:11 -0400)
Add a helper so we can set per asic default values. Also,
the module parameter is currently clamped to 8, but clamp it
per asic just in case some asics have different limits in the
future. Enable the option on gfx6,7 as well for consistency.

Acked-by: Nirmoy Das <nirmoy.das@amd.com>
Reviewed-by: Felix Kuehling <Felix.Kuehling@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/amdgpu/amdgpu_device.c
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.c
drivers/gpu/drm/amd/amdgpu/amdgpu_gfx.h
drivers/gpu/drm/amd/amdgpu/gfx_v10_0.c
drivers/gpu/drm/amd/amdgpu/gfx_v6_0.c
drivers/gpu/drm/amd/amdgpu/gfx_v7_0.c
drivers/gpu/drm/amd/amdgpu/gfx_v8_0.c
drivers/gpu/drm/amd/amdgpu/gfx_v9_0.c

index 5f08e52655eabcb48e13f5cb6a6fd25c7e7e1017..10f28f1b92bbfabd90d1ea6e81b146d5ffe4b585 100644 (file)
@@ -1374,13 +1374,6 @@ static int amdgpu_device_check_arguments(struct amdgpu_device *adev)
 
        amdgpu_gmc_tmz_set(adev);
 
-       if (amdgpu_num_kcq == -1) {
-               amdgpu_num_kcq = 8;
-       } else if (amdgpu_num_kcq > 8 || amdgpu_num_kcq < 0) {
-               amdgpu_num_kcq = 8;
-               dev_warn(adev->dev, "set kernel compute queue number to 8 due to invalid parameter provided by user\n");
-       }
-
        amdgpu_gmc_noretry_set(adev);
 
        return 0;
index 8c9bacfdbc300c751e7fe3713548acd12e984882..e584f48f3b548561ed326cc467a7443d10c58c7e 100644 (file)
@@ -804,3 +804,14 @@ failed_undo:
 failed_kiq_write:
        dev_err(adev->dev, "failed to write reg:%x\n", reg);
 }
+
+int amdgpu_gfx_get_num_kcq(struct amdgpu_device *adev)
+{
+       if (amdgpu_num_kcq == -1) {
+               return 8;
+       } else if (amdgpu_num_kcq > 8 || amdgpu_num_kcq < 0) {
+               dev_warn(adev->dev, "set kernel compute queue number to 8 due to invalid parameter provided by user\n");
+               return 8;
+       }
+       return amdgpu_num_kcq;
+}
index 190753930b1190d338106d6840824902f71c0c4f..786eb4aa7314bcdb2c8bc70c3169eee97d401419 100644 (file)
@@ -393,4 +393,5 @@ int amdgpu_gfx_cp_ecc_error_irq(struct amdgpu_device *adev,
                                  struct amdgpu_iv_entry *entry);
 uint32_t amdgpu_kiq_rreg(struct amdgpu_device *adev, uint32_t reg);
 void amdgpu_kiq_wreg(struct amdgpu_device *adev, uint32_t reg, uint32_t v);
+int amdgpu_gfx_get_num_kcq(struct amdgpu_device *adev);
 #endif
index e42542e564f76219dcb5260bf7ccedfcd404144c..a54143576c6fc9d8ebdc0d3707d0609d52fae221 100644 (file)
@@ -7407,7 +7407,8 @@ static int gfx_v10_0_early_init(void *handle)
                break;
        }
 
-       adev->gfx.num_compute_rings = amdgpu_num_kcq;
+       adev->gfx.num_compute_rings = min(amdgpu_gfx_get_num_kcq(adev),
+                                         AMDGPU_MAX_COMPUTE_RINGS);
 
        gfx_v10_0_set_kiq_pm4_funcs(adev);
        gfx_v10_0_set_ring_funcs(adev);
index 79c52c7a02e3a0bd7779c136beafa591daa0cdaf..671c46ebeced9de471fd49c220df07a947d4e619 100644 (file)
@@ -3064,7 +3064,8 @@ static int gfx_v6_0_early_init(void *handle)
        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
 
        adev->gfx.num_gfx_rings = GFX6_NUM_GFX_RINGS;
-       adev->gfx.num_compute_rings = GFX6_NUM_COMPUTE_RINGS;
+       adev->gfx.num_compute_rings = min(amdgpu_gfx_get_num_kcq(adev),
+                                         GFX6_NUM_COMPUTE_RINGS);
        adev->gfx.funcs = &gfx_v6_0_gfx_funcs;
        adev->gfx.rlc.funcs = &gfx_v6_0_rlc_funcs;
        gfx_v6_0_set_ring_funcs(adev);
index 04eaf3a8fddba0ec118d5249af0d84d634e5006a..cb07bc21dcbe531c57ce05d062ebe58e52ab8cdc 100644 (file)
@@ -4238,7 +4238,8 @@ static int gfx_v7_0_early_init(void *handle)
        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
 
        adev->gfx.num_gfx_rings = GFX7_NUM_GFX_RINGS;
-       adev->gfx.num_compute_rings = AMDGPU_MAX_COMPUTE_RINGS;
+       adev->gfx.num_compute_rings = min(amdgpu_gfx_get_num_kcq(adev),
+                                         AMDGPU_MAX_COMPUTE_RINGS);
        adev->gfx.funcs = &gfx_v7_0_gfx_funcs;
        adev->gfx.rlc.funcs = &gfx_v7_0_rlc_funcs;
        gfx_v7_0_set_ring_funcs(adev);
index 94b7e0531d09285e41e0eb6a21569b081bd8a7a5..6487ea3cfdd2c58b1d65db1fb4236ddb48b6fdff 100644 (file)
@@ -5295,7 +5295,8 @@ static int gfx_v8_0_early_init(void *handle)
        struct amdgpu_device *adev = (struct amdgpu_device *)handle;
 
        adev->gfx.num_gfx_rings = GFX8_NUM_GFX_RINGS;
-       adev->gfx.num_compute_rings = amdgpu_num_kcq;
+       adev->gfx.num_compute_rings = min(amdgpu_gfx_get_num_kcq(adev),
+                                         AMDGPU_MAX_COMPUTE_RINGS);
        adev->gfx.funcs = &gfx_v8_0_gfx_funcs;
        gfx_v8_0_set_ring_funcs(adev);
        gfx_v8_0_set_irq_funcs(adev);
index 0d8e203b10efb2a645d67e8cc51384f811bd698b..3f4bbd0b6a1309492d38d9c149c83d2f37bc5d0f 100644 (file)
@@ -4633,7 +4633,8 @@ static int gfx_v9_0_early_init(void *handle)
                adev->gfx.num_gfx_rings = 0;
        else
                adev->gfx.num_gfx_rings = GFX9_NUM_GFX_RINGS;
-       adev->gfx.num_compute_rings = amdgpu_num_kcq;
+       adev->gfx.num_compute_rings = min(amdgpu_gfx_get_num_kcq(adev),
+                                         AMDGPU_MAX_COMPUTE_RINGS);
        gfx_v9_0_set_kiq_pm4_funcs(adev);
        gfx_v9_0_set_ring_funcs(adev);
        gfx_v9_0_set_irq_funcs(adev);