return;
}
updateModuleCache();
- const size_t index = s_data->traceTree.index(trace, s_data->out);
+ const auto index = s_data->traceTree.index(trace, s_data->out);
#ifdef DEBUG_MALLOC_PTRS
auto it = s_data->known.find(ptr);
s_data->known.insert(ptr);
#endif
- if (fprintf(s_data->out, "+ %zx %zx %" PRIxPTR "\n", size, index, reinterpret_cast<uintptr_t>(ptr)) < 0) {
+ if (fprintf(s_data->out, "+ %zx %x %" PRIxPTR "\n", size, index, reinterpret_cast<uintptr_t>(ptr)) < 0) {
writeError();
return;
}
// index associated to the backtrace up to this instruction pointer
// the evaluation process can then reverse-map the index to the parent ip
// to rebuild the backtrace from the bottom-up
- std::size_t index;
+ uint32_t index;
// Unsorted list of children, assumed to be small
std::vector<TraceEdge> children;
};
*
* Unknown instruction pointers will be printed to @p out.
*/
- std::size_t index(const Trace& trace, FILE* out)
+ uint32_t index(const Trace& trace, FILE* out)
{
- size_t index = 0;
+ uint32_t index = 0;
TraceEdge* parent = &m_root;
for (int i = trace.size() - 1; i >= 0; --i) {
const auto ip = trace[i];
if (it == parent->children.end() || it->instructionPointer != ip) {
index = m_index++;
it = parent->children.insert(it, {ip, index, {}});
- fprintf(out, "t %" PRIxPTR " %zx\n", reinterpret_cast<uintptr_t>(ip), parent->index);
+ fprintf(out, "t %" PRIxPTR " %x\n", reinterpret_cast<uintptr_t>(ip), parent->index);
}
index = it->index;
parent = &(*it);
private:
TraceEdge m_root = {0, 0, {}};
- std::size_t m_index = 1;
+ uint32_t m_index = 1;
};
#endif // TRACETREE_H