drm/amdgpu: Optimize amdgpu_umc_ras_late_init/amdgpu_umc_ras_fini function code

Optimize amdgpu_umc_ras_late_init/amdgpu_umc_ras_fini function code.

Signed-off-by: yipechai <YiPeng.Chai@amd.com>
Reviewed-by: Tao Zhou <tao.zhou1@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.c b/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.c
index ff7805beda384c3d730803a0bb466f3a54d18c15..9f1406e1a48a540adc9eb951e7e1c3bb7b8b739d 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.c
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.c
@@ -129,7 +129,7 @@ int amdgpu_umc_poison_handler(struct amdgpu_device *adev,
        return ret;
 }
 
-static int amdgpu_umc_process_ras_data_cb(struct amdgpu_device *adev,
+int amdgpu_umc_process_ras_data_cb(struct amdgpu_device *adev,
                void *ras_error_status,
                struct amdgpu_iv_entry *entry)
 {
@@ -139,36 +139,15 @@ static int amdgpu_umc_process_ras_data_cb(struct amdgpu_device *adev,
 int amdgpu_umc_ras_late_init(struct amdgpu_device *adev, void *ras_info)
 {
        int r;
-       struct ras_fs_if fs_info = {
-               .sysfs_name = "umc_err_count",
-       };
-       struct ras_ih_if ih_info = {
-               .cb = amdgpu_umc_process_ras_data_cb,
-       };
 
-       if (!adev->umc.ras_if) {
-               adev->umc.ras_if =
-                       kmalloc(sizeof(struct ras_common_if), GFP_KERNEL);
-               if (!adev->umc.ras_if)
-                       return -ENOMEM;
-               adev->umc.ras_if->block = AMDGPU_RAS_BLOCK__UMC;
-               adev->umc.ras_if->type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE;
-               adev->umc.ras_if->sub_block_index = 0;
-       }
-       ih_info.head = fs_info.head = *adev->umc.ras_if;
-
-       r = amdgpu_ras_late_init(adev, adev->umc.ras_if,
-                                &fs_info, &ih_info);
+       r = amdgpu_ras_block_late_init(adev, adev->umc.ras_if);
        if (r)
-               goto free;
+               return r;
 
        if (amdgpu_ras_is_supported(adev, adev->umc.ras_if->block)) {
                r = amdgpu_irq_get(adev, &adev->gmc.ecc_irq, 0);
                if (r)
                        goto late_fini;
-       } else {
-               r = 0;
-               goto free;
        }
 
        /* ras init of specific umc version */
@@ -179,26 +158,15 @@ int amdgpu_umc_ras_late_init(struct amdgpu_device *adev, void *ras_info)
        return 0;
 
 late_fini:
-       amdgpu_ras_late_fini(adev, adev->umc.ras_if, &ih_info);
-free:
-       kfree(adev->umc.ras_if);
-       adev->umc.ras_if = NULL;
+       amdgpu_ras_block_late_fini(adev, adev->umc.ras_if);
        return r;
 }
 
 void amdgpu_umc_ras_fini(struct amdgpu_device *adev)
 {
        if (amdgpu_ras_is_supported(adev, AMDGPU_RAS_BLOCK__UMC) &&
-                       adev->umc.ras_if) {
-               struct ras_common_if *ras_if = adev->umc.ras_if;
-               struct ras_ih_if ih_info = {
-                       .head = *ras_if,
-                       .cb = amdgpu_umc_process_ras_data_cb,
-               };
-
-               amdgpu_ras_late_fini(adev, ras_if, &ih_info);
-               kfree(ras_if);
-       }
+                       adev->umc.ras_if)
+               amdgpu_ras_block_late_fini(adev, adev->umc.ras_if);
 }
 
 int amdgpu_umc_process_ecc_irq(struct amdgpu_device *adev,

diff --git a/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h b/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h
index 4db0526d0be49f14b96c551f0e6337f9ccdf5c76..ec15b364039923a758d7811668d5aa901fc45993 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h
+++ b/drivers/gpu/drm/amd/amdgpu/amdgpu_umc.h
@@ -85,4 +85,8 @@ void amdgpu_umc_fill_error_record(struct ras_err_data *err_data,
                uint64_t retired_page,
                uint32_t channel_index,
                uint32_t umc_inst);
+
+int amdgpu_umc_process_ras_data_cb(struct amdgpu_device *adev,
+               void *ras_error_status,
+               struct amdgpu_iv_entry *entry);
 #endif

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
index 80f6a29ed30c171dbc763df2061ece871a0e1fe0..2fc8761ede1a09d2305415b69f1f63928148ecfe 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v10_0.c
@@ -674,6 +674,8 @@ static void gmc_v10_0_set_umc_funcs(struct amdgpu_device *adev)
 
                strcpy(adev->umc.ras->ras_block.ras_comm.name, "umc");
                adev->umc.ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__UMC;
+               adev->umc.ras->ras_block.ras_comm.type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE;
+               adev->umc.ras_if = &adev->umc.ras->ras_block.ras_comm;
 
                /* If don't define special ras_late_init function, use default ras_late_init */
                if (!adev->umc.ras->ras_block.ras_late_init)
@@ -682,6 +684,10 @@ static void gmc_v10_0_set_umc_funcs(struct amdgpu_device *adev)
                /* If don't define special ras_fini function, use default ras_fini */
                if (!adev->umc.ras->ras_block.ras_fini)
                                adev->umc.ras->ras_block.ras_fini = amdgpu_umc_ras_fini;
+
+               /* If not defined special ras_cb function, use default ras_cb */
+               if (!adev->umc.ras->ras_block.ras_cb)
+                       adev->umc.ras->ras_block.ras_cb = amdgpu_umc_process_ras_data_cb;
        }
 }
 

diff --git a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
index 15958fd45f64766ac70c92bcf314dfc88e1f9f82..94095b965e2c94b03ea94522c79582687a334da3 100644 (file)
--- a/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
+++ b/drivers/gpu/drm/amd/amdgpu/gmc_v9_0.c
@@ -1234,6 +1234,8 @@ static void gmc_v9_0_set_umc_funcs(struct amdgpu_device *adev)
 
                strcpy(adev->umc.ras->ras_block.ras_comm.name, "umc");
                adev->umc.ras->ras_block.ras_comm.block = AMDGPU_RAS_BLOCK__UMC;
+               adev->umc.ras->ras_block.ras_comm.type = AMDGPU_RAS_ERROR__MULTI_UNCORRECTABLE;
+               adev->umc.ras_if = &adev->umc.ras->ras_block.ras_comm;
 
                /* If don't define special ras_late_init function, use default ras_late_init */
                if (!adev->umc.ras->ras_block.ras_late_init)
@@ -1242,6 +1244,10 @@ static void gmc_v9_0_set_umc_funcs(struct amdgpu_device *adev)
                /* If don't define special ras_fini function, use default ras_fini */
                if (!adev->umc.ras->ras_block.ras_fini)
                                adev->umc.ras->ras_block.ras_fini = amdgpu_umc_ras_fini;
+
+               /* If not defined special ras_cb function, use default ras_cb */
+               if (!adev->umc.ras->ras_block.ras_cb)
+                       adev->umc.ras->ras_block.ras_cb = amdgpu_umc_process_ras_data_cb;
        }
 }