x86: Disable -mforce-indirect-call for PIC in 32-bit mode

-mforce-indirect-call generates invalid instruction in 32-bit MI thunk
since there are no available scratch registers in 32-bit PIC mode.
Disable -mforce-indirect-call for PIC in 32-bit mode when generating
MI thunk.

gcc/

	PR target/105980
	* config/i386/i386.cc (x86_output_mi_thunk): Disable
	-mforce-indirect-call for PIC in 32-bit mode.

gcc/testsuite/

	PR target/105980
	* g++.target/i386/pr105980.C: New test.

diff --git a/gcc/config/i386/i386.cc b/gcc/config/i386/i386.cc
index 19fb03c..3cacf73 100644 (file)
--- a/gcc/config/i386/i386.cc
+++ b/gcc/config/i386/i386.cc
@@ -21480,6 +21480,7 @@ x86_output_mi_thunk (FILE *file, tree thunk_fndecl, HOST_WIDE_INT delta,
   rtx this_reg, tmp, fnaddr;
   unsigned int tmp_regno;
   rtx_insn *insn;
+  int saved_flag_force_indirect_call = flag_force_indirect_call;
 
   if (TARGET_64BIT)
     tmp_regno = R10_REG;
@@ -21492,6 +21493,9 @@ x86_output_mi_thunk (FILE *file, tree thunk_fndecl, HOST_WIDE_INT delta,
        tmp_regno = DX_REG;
       else
        tmp_regno = CX_REG;
+
+      if (flag_pic)
+  flag_force_indirect_call = 0;
     }
 
   emit_note (NOTE_INSN_PROLOGUE_END);
@@ -21659,6 +21663,8 @@ x86_output_mi_thunk (FILE *file, tree thunk_fndecl, HOST_WIDE_INT delta,
   final (insn, file, 1);
   final_end_function ();
   assemble_end_function (thunk_fndecl, fnname);
+
+  flag_force_indirect_call = saved_flag_force_indirect_call;
 }
 
 static void

diff --git a/gcc/testsuite/g++.target/i386/pr105980.C b/gcc/testsuite/g++.target/i386/pr105980.C
new file mode 100644 (file)
index 0000000..d8dbc33
--- /dev/null
+++ b/gcc/testsuite/g++.target/i386/pr105980.C
@@ -0,0 +1,8 @@
+// { dg-do assemble { target { fpic } } }
+// { dg-options "-O0 -fpic -mforce-indirect-call" }
+
+struct A {
+  virtual ~A();
+};
+struct B : virtual A {};
+void bar() { B(); }