drm/i915: Declare .(de)gamma_lut_tests for icl+
authorVille Syrjälä <ville.syrjala@linux.intel.com>
Thu, 14 Oct 2021 18:18:55 +0000 (21:18 +0300)
committerVille Syrjälä <ville.syrjala@linux.intel.com>
Thu, 18 Nov 2021 20:31:15 +0000 (22:31 +0200)
All interpolated gamma modes including the icl+ multi segment
mode require non-decreasing entries for the interpolation to
work correctly. For some reason we're forgetting to declare
that for icl+. Let us do so.

References: https://gitlab.freedesktop.org/drm/intel/-/issues/3916
Signed-off-by: Ville Syrjälä <ville.syrjala@linux.intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20211014181856.17581-1-ville.syrjala@linux.intel.com
Reviewed-by: Uma Shankar <uma.shankar@intel.com>
drivers/gpu/drm/i915/i915_pci.c

index c408941..b8586a5 100644 (file)
                   .degamma_lut_tests = DRM_COLOR_LUT_NON_DECREASING | \
                                        DRM_COLOR_LUT_EQUAL_CHANNELS, \
        }
+#define ICL_COLORS \
+       .color = { .degamma_lut_size = 33, .gamma_lut_size = 262145, \
+                  .degamma_lut_tests = DRM_COLOR_LUT_NON_DECREASING | \
+                                       DRM_COLOR_LUT_EQUAL_CHANNELS, \
+                  .gamma_lut_tests = DRM_COLOR_LUT_NON_DECREASING, \
+       }
 
 /* Keep in gen based order, and chronological order within a gen */
 
@@ -812,7 +818,7 @@ static const struct intel_device_info cml_gt2_info = {
                [TRANSCODER_DSI_1] = TRANSCODER_DSI1_OFFSET, \
        }, \
        GEN(11), \
-       .color = { .degamma_lut_size = 33, .gamma_lut_size = 262145 }, \
+       ICL_COLORS, \
        .dbuf.size = 2048, \
        .dbuf.slice_mask = BIT(DBUF_S1) | BIT(DBUF_S2), \
        .display.has_dsc = 1, \