freedreno/a6xx: larger gmem_page_align from tile align instead of gpu id
authorJonathan Marek <jonathan@marek.ca>
Thu, 20 May 2021 01:56:53 +0000 (21:56 -0400)
committerMarge Bot <eric+marge@anholt.net>
Wed, 14 Jul 2021 01:58:00 +0000 (01:58 +0000)
The larger page alignment is directly related to the 96 tile alignment,
so check for that instead of a specific gpu id.

Signed-off-by: Jonathan Marek <jonathan@marek.ca>
Signed-off-by: Rob Clark <robdclark@chromium.org>
Part-of: <https://gitlab.freedesktop.org/mesa/mesa/-/merge_requests/11790>

src/gallium/drivers/freedreno/freedreno_gmem.c
src/gallium/drivers/freedreno/freedreno_screen.h

index 4af7d06..4fec170 100644 (file)
@@ -516,7 +516,7 @@ gmem_key_init(struct fd_batch *batch, bool assume_zs, bool no_scis_opt)
        */
       key->gmem_page_align = 8;
    } else if (is_a6xx(screen)) {
-      key->gmem_page_align = is_a650(screen) ? 3 : 1;
+      key->gmem_page_align = (screen->info.tile_align_w == 96) ? 3 : 1;
    } else {
       // TODO re-check this across gens.. maybe it should only
       // be a single page in some cases:
index d594508..fb17ddf 100644 (file)
@@ -223,12 +223,6 @@ is_a6xx(struct fd_screen *screen)
    return (screen->gpu_id >= 600) && (screen->gpu_id < 700);
 }
 
-static inline boolean
-is_a650(struct fd_screen *screen)
-{
-   return screen->gpu_id == 650;
-}
-
 /* is it using the ir3 compiler (shader isa introduced with a3xx)? */
 static inline boolean
 is_ir3(struct fd_screen *screen)