soc: imx: gpcv2: Add support for missing i.MX8MM VPU/DISPMIX power domains

With the BLK-CTL driver now in place, let's add the missing domains.

Tested-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Lucas Stach <l.stach@pengutronix.de>
Signed-off-by: Frieder Schrempf <frieder.schrempf@kontron.de>
Signed-off-by: Peng Fan <peng.fan@nxp.com>
Signed-off-by: Shawn Guo <shawnguo@kernel.org>

diff --git a/drivers/soc/imx/gpcv2.c b/drivers/soc/imx/gpcv2.c
index d676e65..2490757 100644 (file)
--- a/drivers/soc/imx/gpcv2.c
+++ b/drivers/soc/imx/gpcv2.c
@@ -650,6 +650,76 @@ static const struct imx_pgc_domain imx8mm_pgc_domains[] = {
                },
                .pgc   = IMX8MM_PGC_GPU2D,
        },
+
+       [IMX8MM_POWER_DOMAIN_VPUMIX] = {
+               .genpd = {
+                       .name = "vpumix",
+               },
+               .bits  = {
+                       .pxx = IMX8MM_VPUMIX_SW_Pxx_REQ,
+                       .map = IMX8MM_VPUMIX_A53_DOMAIN,
+                       .hskreq = IMX8MM_VPUMIX_HSK_PWRDNREQN,
+                       .hskack = IMX8MM_VPUMIX_HSK_PWRDNACKN,
+               },
+               .pgc   = IMX8MM_PGC_VPUMIX,
+       },
+
+       [IMX8MM_POWER_DOMAIN_VPUG1] = {
+               .genpd = {
+                       .name = "vpu-g1",
+               },
+               .bits  = {
+                       .pxx = IMX8MM_VPUG1_SW_Pxx_REQ,
+                       .map = IMX8MM_VPUG1_A53_DOMAIN,
+               },
+               .pgc   = IMX8MM_PGC_VPUG1,
+       },
+
+       [IMX8MM_POWER_DOMAIN_VPUG2] = {
+               .genpd = {
+                       .name = "vpu-g2",
+               },
+               .bits  = {
+                       .pxx = IMX8MM_VPUG2_SW_Pxx_REQ,
+                       .map = IMX8MM_VPUG2_A53_DOMAIN,
+               },
+               .pgc   = IMX8MM_PGC_VPUG2,
+       },
+
+       [IMX8MM_POWER_DOMAIN_VPUH1] = {
+               .genpd = {
+                       .name = "vpu-h1",
+               },
+               .bits  = {
+                       .pxx = IMX8MM_VPUH1_SW_Pxx_REQ,
+                       .map = IMX8MM_VPUH1_A53_DOMAIN,
+               },
+               .pgc   = IMX8MM_PGC_VPUH1,
+       },
+
+       [IMX8MM_POWER_DOMAIN_DISPMIX] = {
+               .genpd = {
+                       .name = "dispmix",
+               },
+               .bits  = {
+                       .pxx = IMX8MM_DISPMIX_SW_Pxx_REQ,
+                       .map = IMX8MM_DISPMIX_A53_DOMAIN,
+                       .hskreq = IMX8MM_DISPMIX_HSK_PWRDNREQN,
+                       .hskack = IMX8MM_DISPMIX_HSK_PWRDNACKN,
+               },
+               .pgc   = IMX8MM_PGC_DISPMIX,
+       },
+
+       [IMX8MM_POWER_DOMAIN_MIPI] = {
+               .genpd = {
+                       .name = "mipi",
+               },
+               .bits  = {
+                       .pxx = IMX8MM_MIPI_SW_Pxx_REQ,
+                       .map = IMX8MM_MIPI_A53_DOMAIN,
+               },
+               .pgc   = IMX8MM_PGC_MIPI,
+       },
 };
 
 static const struct regmap_range imx8mm_yes_ranges[] = {