drm/amd/display: Initial prototype of FBC implementation
authorRoman Li <Roman.Li@amd.com>
Thu, 27 Jul 2017 23:53:55 +0000 (19:53 -0400)
committerAlex Deucher <alexander.deucher@amd.com>
Tue, 26 Sep 2017 22:15:56 +0000 (18:15 -0400)
- Protected by ENABLE_FBC compile flag
- DC part will follow

Signed-off-by: Roman Li <Roman.Li@amd.com>
Reviewed-by: Tony Cheng <Tony.Cheng@amd.com>
Acked-by: Harry Wentland <Harry.Wentland@amd.com>
Signed-off-by: Alex Deucher <alexander.deucher@amd.com>
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.c
drivers/gpu/drm/amd/display/amdgpu_dm/amdgpu_dm.h

index 02ca9d6..dfb04c5 100644 (file)
@@ -297,6 +297,30 @@ static void hotplug_notify_work_func(struct work_struct *work)
        drm_kms_helper_hotplug_event(dev);
 }
 
+#ifdef ENABLE_FBC
+#include "dal_asic_id.h"
+/* Allocate memory for FBC compressed data  */
+/* TODO: Dynamic allocation */
+#define AMDGPU_FBC_SIZE    (3840 * 2160 * 4)
+
+void amdgpu_dm_initialize_fbc(struct amdgpu_device *adev)
+{
+       int r;
+       struct dm_comressor_info *compressor = &adev->dm.compressor;
+
+       if (!compressor->bo_ptr) {
+               r = amdgpu_bo_create_kernel(adev, AMDGPU_FBC_SIZE, PAGE_SIZE,
+                               AMDGPU_GEM_DOMAIN_VRAM, &compressor->bo_ptr,
+                               &compressor->gpu_addr, &compressor->cpu_addr);
+
+               if (r)
+                       DRM_ERROR("DM: Failed to initialize fbc\n");
+       }
+
+}
+#endif
+
+
 /* Init display KMS
  *
  * Returns 0 on success
@@ -347,6 +371,11 @@ int amdgpu_dm_init(struct amdgpu_device *adev)
 
        init_data.dce_environment = DCE_ENV_PRODUCTION_DRV;
 
+#ifdef ENABLE_FBC
+       if (adev->family == FAMILY_CZ)
+               amdgpu_dm_initialize_fbc(adev);
+       init_data.fbc_gpu_addr = adev->dm.compressor.gpu_addr;
+#endif
        /* Display Core create. */
        adev->dm.dc = dc_create(&init_data);
 
index 16b2e08..ce0223a 100644 (file)
@@ -72,6 +72,15 @@ struct irq_list_head {
        struct work_struct work;
 };
 
+#ifdef ENABLE_FBC
+struct dm_comressor_info {
+       void *cpu_addr;
+       struct amdgpu_bo *bo_ptr;
+       uint64_t gpu_addr;
+};
+#endif
+
+
 struct amdgpu_display_manager {
        struct dal *dal;
        struct dc *dc;
@@ -133,6 +142,9 @@ struct amdgpu_display_manager {
         * Caches device atomic state for suspend/resume
         */
        struct drm_atomic_state *cached_state;
+#ifdef ENABLE_FBC
+       struct dm_comressor_info compressor;
+#endif
 };
 
 /* basic init/fini API */