net/mlx5e: Allow to match on ICMP parameters
authorMaor Dickman <maord@nvidia.com>
Sun, 24 Jan 2021 13:56:36 +0000 (15:56 +0200)
committerSaeed Mahameed <saeedm@nvidia.com>
Fri, 12 Mar 2021 23:29:34 +0000 (15:29 -0800)
Support matching on ICMPv4/6 type and code parameters using misc3
section of match parameters.

Signed-off-by: Maor Dickman <maord@nvidia.com>
Reviewed-by: Roi Dayan <roid@nvidia.com>
Signed-off-by: Saeed Mahameed <saeedm@nvidia.com>
drivers/net/ethernet/mellanox/mlx5/core/en_tc.c
include/linux/mlx5/device.h

index 121f0a7..54ea0da 100644 (file)
@@ -1961,6 +1961,10 @@ static int __parse_cls_flower(struct mlx5e_priv *priv,
                                    misc_parameters);
        void *misc_v = MLX5_ADDR_OF(fte_match_param, spec->match_value,
                                    misc_parameters);
+       void *misc_c_3 = MLX5_ADDR_OF(fte_match_param, spec->match_criteria,
+                                   misc_parameters_3);
+       void *misc_v_3 = MLX5_ADDR_OF(fte_match_param, spec->match_value,
+                                   misc_parameters_3);
        struct flow_rule *rule = flow_cls_offload_flow_rule(f);
        struct flow_dissector *dissector = rule->match.dissector;
        u16 addr_type = 0;
@@ -1990,6 +1994,7 @@ static int __parse_cls_flower(struct mlx5e_priv *priv,
              BIT(FLOW_DISSECTOR_KEY_CT) |
              BIT(FLOW_DISSECTOR_KEY_ENC_IP) |
              BIT(FLOW_DISSECTOR_KEY_ENC_OPTS) |
+             BIT(FLOW_DISSECTOR_KEY_ICMP) |
              BIT(FLOW_DISSECTOR_KEY_MPLS))) {
                NL_SET_ERR_MSG_MOD(extack, "Unsupported key");
                netdev_dbg(priv->netdev, "Unsupported key used: 0x%x\n",
@@ -2309,7 +2314,49 @@ static int __parse_cls_flower(struct mlx5e_priv *priv,
                if (match.mask->flags)
                        *match_level = MLX5_MATCH_L4;
        }
+       if (flow_rule_match_key(rule, FLOW_DISSECTOR_KEY_ICMP)) {
+               struct flow_match_icmp match;
 
+               flow_rule_match_icmp(rule, &match);
+               switch (ip_proto) {
+               case IPPROTO_ICMP:
+                       if (!(MLX5_CAP_GEN(priv->mdev, flex_parser_protocols) &
+                             MLX5_FLEX_PROTO_ICMP))
+                               return -EOPNOTSUPP;
+                       MLX5_SET(fte_match_set_misc3, misc_c_3, icmp_type,
+                                match.mask->type);
+                       MLX5_SET(fte_match_set_misc3, misc_v_3, icmp_type,
+                                match.key->type);
+                       MLX5_SET(fte_match_set_misc3, misc_c_3, icmp_code,
+                                match.mask->code);
+                       MLX5_SET(fte_match_set_misc3, misc_v_3, icmp_code,
+                                match.key->code);
+                       break;
+               case IPPROTO_ICMPV6:
+                       if (!(MLX5_CAP_GEN(priv->mdev, flex_parser_protocols) &
+                             MLX5_FLEX_PROTO_ICMPV6))
+                               return -EOPNOTSUPP;
+                       MLX5_SET(fte_match_set_misc3, misc_c_3, icmpv6_type,
+                                match.mask->type);
+                       MLX5_SET(fte_match_set_misc3, misc_v_3, icmpv6_type,
+                                match.key->type);
+                       MLX5_SET(fte_match_set_misc3, misc_c_3, icmpv6_code,
+                                match.mask->code);
+                       MLX5_SET(fte_match_set_misc3, misc_v_3, icmpv6_code,
+                                match.key->code);
+                       break;
+               default:
+                       NL_SET_ERR_MSG_MOD(extack,
+                                          "Code and type matching only with ICMP and ICMPv6");
+                       netdev_err(priv->netdev,
+                                  "Code and type matching only with ICMP and ICMPv6\n");
+                       return -EINVAL;
+               }
+               if (match.mask->code || match.mask->type) {
+                       *match_level = MLX5_MATCH_L4;
+                       spec->match_criteria_enable |= MLX5_MATCH_MISC_PARAMETERS_3;
+               }
+       }
        return 0;
 }
 
index dc3d250..92a029a 100644 (file)
@@ -1142,6 +1142,8 @@ enum mlx5_flex_parser_protos {
        MLX5_FLEX_PROTO_GENEVE        = 1 << 3,
        MLX5_FLEX_PROTO_CW_MPLS_GRE   = 1 << 4,
        MLX5_FLEX_PROTO_CW_MPLS_UDP   = 1 << 5,
+       MLX5_FLEX_PROTO_ICMP          = 1 << 8,
+       MLX5_FLEX_PROTO_ICMPV6        = 1 << 9,
 };
 
 /* MLX5 DEV CAPs */