Temporarily revert r371640 "LiveIntervals: Split live intervals on multiple dead...

It reveals a miscompile on Hexagon. See PR43302 for details.

llvm-svn: 371802

diff --git a/llvm/lib/CodeGen/LiveIntervals.cpp b/llvm/lib/CodeGen/LiveIntervals.cpp
index 2d5b8e7..0781a0b 100644 (file)
--- a/llvm/lib/CodeGen/LiveIntervals.cpp
+++ b/llvm/lib/CodeGen/LiveIntervals.cpp
@@ -196,11 +196,7 @@ void LiveIntervals::computeVirtRegInterval(LiveInterval &LI) {
   assert(LI.empty() && "Should only compute empty intervals.");
   LRCalc->reset(MF, getSlotIndexes(), DomTree, &getVNInfoAllocator());
   LRCalc->calculate(LI, MRI->shouldTrackSubRegLiveness(LI.reg));
-
-  if (computeDeadValues(LI, nullptr)) {
-    SmallVector<LiveInterval *, 4> SplitIntervals;
-    splitSeparateComponents(LI, SplitIntervals);
-  }
+  computeDeadValues(LI, nullptr);
 }
 
 void LiveIntervals::computeVirtRegs() {
@@ -504,8 +500,6 @@ bool LiveIntervals::shrinkToUses(LiveInterval *li,
 bool LiveIntervals::computeDeadValues(LiveInterval &LI,
                                       SmallVectorImpl<MachineInstr*> *dead) {
   bool MayHaveSplitComponents = false;
-  bool HaveDeadDef = false;
-
   for (VNInfo *VNI : LI.valnos) {
     if (VNI->isUnused())
       continue;
@@ -536,10 +530,6 @@ bool LiveIntervals::computeDeadValues(LiveInterval &LI,
       MachineInstr *MI = getInstructionFromIndex(Def);
       assert(MI && "No instruction defining live value");
       MI->addRegisterDead(LI.reg, TRI);
-      if (HaveDeadDef)
-        MayHaveSplitComponents = true;
-      HaveDeadDef = true;
-
       if (dead && MI->allDefsAreDead()) {
         LLVM_DEBUG(dbgs() << "All defs dead: " << Def << '\t' << *MI);
         dead->push_back(MI);

diff --git a/llvm/test/CodeGen/AMDGPU/live-intervals-multiple-dead-defs.mir b/llvm/test/CodeGen/AMDGPU/live-intervals-multiple-dead-defs.mir
deleted file mode 100644 (file)
index 4c402d7..0000000
--- a/llvm/test/CodeGen/AMDGPU/live-intervals-multiple-dead-defs.mir
+++ /dev/null
@@ -1,18 +0,0 @@
-# NOTE: Assertions have been autogenerated by utils/update_mir_test_checks.py
-# RUN: llc -mtriple=amdgcn-amd-amdhsa -mcpu=gfx906 -verify-machineinstrs -run-pass=machine-scheduler -verify-misched -o - %s | FileCheck %s
-
-# There are multiple dead defs of the same virtual register. Make sure
-# the intervals are split during the initial live range computation.
-
----
-name:            multiple_connected_components_dead
-tracksRegLiveness: true
-body:             |
-  bb.0:
-    ; CHECK-LABEL: name: multiple_connected_components_dead
-    ; CHECK: dead %1:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
-    ; CHECK: dead %0:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
-    dead %0:vgpr_32 = V_MOV_B32_e32 0, implicit $exec
-    dead %0:vgpr_32 = V_MOV_B32_e32 1, implicit $exec
-
-...