Introduce LOGICAL_AND op in runtime (#3564)

This patch introduces LOGICAL_AND op in our runtime.
Related issue: #3459

Signed-off-by: prasannar <prasanna.r@samsung.com>

diff --git a/runtimes/pure_arm_compute/src/compilation.cc b/runtimes/pure_arm_compute/src/compilation.cc
index 00e88e0..133f075 100644 (file)
--- a/runtimes/pure_arm_compute/src/compilation.cc
+++ b/runtimes/pure_arm_compute/src/compilation.cc
@@ -547,6 +547,7 @@ public:
   void visit(const ::internal::tflite::op::Floor::Node &node) override;
   void visit(const ::internal::tflite::op::Split::Node &node) override;
   void visit(const ::internal::tflite::op::ArgMax::Node &node) override;
+  void visit(const ::internal::tflite::op::Logical_AND::Node &node) override;
   void visit(const ::internal::tflite::op::RSQRT::Node &node) override;
   void visit(const ::internal::tflite::op::SQRT::Node &node) override;
   void visit(const ::internal::tflite::op::Pad::Node &node) override;
@@ -3653,6 +3654,13 @@ void Planner::visit(const ::internal::tflite::op::SQRT::Node &node)
   _builder.addStage(stage);
 }
 
+void Planner::visit(const ::internal::tflite::op::Logical_AND::Node &node)
+{
+  VERBOSE(Logical_AND) << "Configure Logical_AND operation" << std::endl;
+
+  throw std::runtime_error("Not supported, yet");
+}
+
 void Planner::visit(const ::internal::tflite::op::RSQRT::Node &node)
 {
   VERBOSE(RSQRT) << "Configure Rsqrt operation" << std::endl;

diff --git a/runtimes/pure_arm_compute/src/internal/op/Logical_AND.cc b/runtimes/pure_arm_compute/src/internal/op/Logical_AND.cc
new file mode 100644 (file)
index 0000000..50905c6
--- /dev/null
+++ b/runtimes/pure_arm_compute/src/internal/op/Logical_AND.cc
@@ -0,0 +1,65 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#include "internal/op/Logical_AND.h"
+#include "internal/op/NodeVisitor.h"
+
+#include <cassert>
+
+namespace internal
+{
+namespace tflite
+{
+namespace op
+{
+namespace Logical_AND
+{
+
+void Node::accept(NodeVisitor &&v) const { v.visit(*this); }
+
+} // namespace Logical_AND
+} // namespace op
+} // namespace tflite
+} // namespace internal
+
+namespace internal
+{
+namespace tflite
+{
+namespace op
+{
+namespace Logical_AND
+{
+
+Param::Param(uint32_t inputCount, const uint32_t *inputs, uint32_t outputCount,
+             const uint32_t *outputs)
+{
+  assert(inputCount == 2 && outputCount == 1);
+
+  output_index = outputs[0];
+
+  // Each input should be interpreted as follows:
+  //
+  //  0 -> input1 Tensor Index
+  //  1 -> input2 Tensor Index
+  input1_index = inputs[0];
+  input2_index = inputs[1];
+}
+
+} // namespace Logical_AND
+} // namespace op
+} // namespace tflite
+} // namespace internal

diff --git a/runtimes/pure_arm_compute/src/internal/op/Logical_AND.h b/runtimes/pure_arm_compute/src/internal/op/Logical_AND.h
new file mode 100644 (file)
index 0000000..23a9e9f
--- /dev/null
+++ b/runtimes/pure_arm_compute/src/internal/op/Logical_AND.h
@@ -0,0 +1,83 @@
+/*
+ * Copyright (c) 2018 Samsung Electronics Co., Ltd. All Rights Reserved
+ *
+ * Licensed under the Apache License, Version 2.0 (the "License");
+ * you may not use this file except in compliance with the License.
+ * You may obtain a copy of the License at
+ *
+ *    http://www.apache.org/licenses/LICENSE-2.0
+ *
+ * Unless required by applicable law or agreed to in writing, software
+ * distributed under the License is distributed on an "AS IS" BASIS,
+ * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
+ * See the License for the specific language governing permissions and
+ * limitations under the License.
+ */
+
+#ifndef __INTERNAL_OP_LOGICAL_AND_H__
+#define __INTERNAL_OP_LOGICAL_AND_H__
+
+#include "internal/op/Node.h"
+
+#include <cstdint>
+
+namespace internal
+{
+namespace tflite
+{
+namespace op
+{
+namespace Logical_AND
+{
+
+struct Param
+{
+  int32_t output_index;
+
+  int32_t input1_index;
+  int32_t input2_index;
+
+  Param() = default;
+  Param(uint32_t inputCount, const uint32_t *inputs, uint32_t outputCount, const uint32_t *outputs);
+};
+
+} // namespace Logical_AND
+} // namespace op
+} // namespace tflite
+} // namespace internal
+
+namespace internal
+{
+namespace tflite
+{
+namespace op
+{
+namespace Logical_AND
+{
+class Node final : public op::Node
+{
+public:
+  Node(const Param &param) : _param(param)
+  {
+    // DO NOTHING
+  }
+
+public:
+  virtual ~Node() = default;
+
+public:
+  const Param &param(void) const { return _param; }
+
+public:
+  void accept(NodeVisitor &&) const override;
+
+private:
+  const Param _param;
+};
+
+} // namespace Logical_AND
+} // namespace op
+} // namespace tflite
+} // namespace internal
+
+#endif // __INTERNAL_OP_LOGICAL_AND_H__

diff --git a/runtimes/pure_arm_compute/src/internal/op/NodeVisitor.h b/runtimes/pure_arm_compute/src/internal/op/NodeVisitor.h
index 2d76c14..08c2fee 100644 (file)
--- a/runtimes/pure_arm_compute/src/internal/op/NodeVisitor.h
+++ b/runtimes/pure_arm_compute/src/internal/op/NodeVisitor.h
@@ -74,6 +74,7 @@
 #include "internal/op/ReduceSum.h"
 #include "internal/op/Equal.h"
 #include "internal/op/BatchToSpaceNd.h"
+#include "internal/op/Logical_AND.h"
 #include "internal/op/TransposeConv.h"
 #include "internal/op/Pack.h"
 #include "internal/op/Abs.h"
@@ -331,6 +332,12 @@ struct NodeVisitor
    * @param[in] node SQRT node to visit
    * @return N/A
    */
+  virtual void visit(const Logical_AND::Node &) = 0;
+  /**
+   * @brief Visit a Logical_AND node
+   * @param[in] node Logical_AND node to visit
+   * @return N/A
+   */
   virtual void visit(const SQRT::Node &) = 0;
   /**
    * @brief Visit a Pad node

diff --git a/runtimes/pure_arm_compute/src/model.cc b/runtimes/pure_arm_compute/src/model.cc
index 6580698..c2a091a 100644 (file)
--- a/runtimes/pure_arm_compute/src/model.cc
+++ b/runtimes/pure_arm_compute/src/model.cc
@@ -786,6 +786,18 @@ int ANeuralNetworksModel_addOperationEx(ANeuralNetworksModel *model,
 
       break;
     }
+    case ANEURALNETWORKS_LOGICAL_AND_EX:
+    {
+      using internal::tflite::op::Logical_AND::Param;
+      using internal::tflite::op::Logical_AND::Node;
+
+      // Add 'operations'
+      auto &operations = model->deref().operations();
+
+      operations.emplace_back<Node>(Param{inputCount, inputs, outputCount, outputs});
+
+      break;
+    }
     case ANEURALNETWORKS_RSQRT_EX:
     {
       using internal::tflite::op::RSQRT::Param;