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arm64: dts: mediatek: Add infra #reset-cells property for MT8192
authorRex-BC Chen <rex-bc.chen@mediatek.com>
Tue, 3 May 2022 09:38:55 +0000 (17:38 +0800)
committerMatthias Brugger <matthias.bgg@gmail.com>
Wed, 22 Jun 2022 11:04:36 +0000 (13:04 +0200)
To support reset of infra, we add property of #reset-cells.

Signed-off-by: Rex-BC Chen <rex-bc.chen@mediatek.com>
Reviewed-by: AngeloGioacchino Del Regno <angelogioacchino.delregno@collabora.com>
Link: https://lore.kernel.org/r/20220503093856.22250-16-rex-bc.chen@mediatek.com
Signed-off-by: Matthias Brugger <matthias.bgg@gmail.com>
arch/arm64/boot/dts/mediatek/mt8192.dtsi patch | blob | history

diff --git a/arch/arm64/boot/dts/mediatek/mt8192.dtsi b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
index 733aec2..13ba5fe 100644 (file)
--- a/arch/arm64/boot/dts/mediatek/mt8192.dtsi
+++ b/arch/arm64/boot/dts/mediatek/mt8192.dtsi
@@ -271,6 +271,7 @@
                        compatible = "mediatek,mt8192-infracfg", "syscon";
                        reg = <0 0x10001000 0 0x1000>;
                        #clock-cells = <1>;
+                       #reset-cells = <1>;
                };
 
                pericfg: syscon@10003000 {
Domain: System / Kernel;