arm64: pmuv3: dynamically map PERF_COUNT_HW_BRANCH_INSTRUCTIONS

The mapping of perf_events generic hardware events to actual PMU events on
ARM PMUv3 may not always be correct. This is in particular true for the
PERF_COUNT_HW_BRANCH_INSTRUCTIONS event. Although the mapping points to an
architected event, it may not always be available. This can be seen with a
simple:

$ perf stat -e branches sleep 0
 Performance counter stats for 'sleep 0':

   <not supported>      branches

       0.001401081 seconds time elapsed

Yet the hardware does have an event that could be used for branches.

Dynamically check for a supported hardware event which can be used for
PERF_COUNT_HW_BRANCH_INSTRUCTIONS at mapping time.

And with that:

$ perf stat -e branches sleep 0

 Performance counter stats for 'sleep 0':

           166,739      branches

       0.000832163 seconds time elapsed

Co-developed-by: Stephane Eranian <eranian@google.com>
Signed-off-by: Stephane Eranian <eranian@google.com>
Co-developed-by: Mark Rutland <mark.rutland@arm.com>
Signed-off-by: Mark Rutland <mark.rutland@arm.com>
Co-developed-by: Peter Newman <peternewman@google.com>
Signed-off-by: Peter Newman <peternewman@google.com>
Link: https://lore.kernel.org/all/YvunKCJHSXKz%2FkZB@FVFF77S0Q05N
Link: https://lore.kernel.org/r/20230411093809.657501-1-peternewman@google.com
Signed-off-by: Will Deacon <will@kernel.org>

diff --git a/drivers/perf/arm_pmuv3.c b/drivers/perf/arm_pmuv3.c
index 34ed0d5..c98e403 100644 (file)
--- a/drivers/perf/arm_pmuv3.c
+++ b/drivers/perf/arm_pmuv3.c
@@ -46,7 +46,6 @@ static const unsigned armv8_pmuv3_perf_map[PERF_COUNT_HW_MAX] = {
        [PERF_COUNT_HW_INSTRUCTIONS]            = ARMV8_PMUV3_PERFCTR_INST_RETIRED,
        [PERF_COUNT_HW_CACHE_REFERENCES]        = ARMV8_PMUV3_PERFCTR_L1D_CACHE,
        [PERF_COUNT_HW_CACHE_MISSES]            = ARMV8_PMUV3_PERFCTR_L1D_CACHE_REFILL,
-       [PERF_COUNT_HW_BRANCH_INSTRUCTIONS]     = ARMV8_PMUV3_PERFCTR_PC_WRITE_RETIRED,
        [PERF_COUNT_HW_BRANCH_MISSES]           = ARMV8_PMUV3_PERFCTR_BR_MIS_PRED,
        [PERF_COUNT_HW_BUS_CYCLES]              = ARMV8_PMUV3_PERFCTR_BUS_CYCLES,
        [PERF_COUNT_HW_STALLED_CYCLES_FRONTEND] = ARMV8_PMUV3_PERFCTR_STALL_FRONTEND,
@@ -985,6 +984,28 @@ static void armv8pmu_reset(void *info)
        armv8pmu_pmcr_write(pmcr);
 }
 
+static int __armv8_pmuv3_map_event_id(struct arm_pmu *armpmu,
+                                     struct perf_event *event)
+{
+       if (event->attr.type == PERF_TYPE_HARDWARE &&
+           event->attr.config == PERF_COUNT_HW_BRANCH_INSTRUCTIONS) {
+
+               if (test_bit(ARMV8_PMUV3_PERFCTR_PC_WRITE_RETIRED,
+                            armpmu->pmceid_bitmap))
+                       return ARMV8_PMUV3_PERFCTR_PC_WRITE_RETIRED;
+
+               if (test_bit(ARMV8_PMUV3_PERFCTR_BR_RETIRED,
+                            armpmu->pmceid_bitmap))
+                       return ARMV8_PMUV3_PERFCTR_BR_RETIRED;
+
+               return HW_OP_UNSUPPORTED;
+       }
+
+       return armpmu_map_event(event, &armv8_pmuv3_perf_map,
+                               &armv8_pmuv3_perf_cache_map,
+                               ARMV8_PMU_EVTYPE_EVENT);
+}
+
 static int __armv8_pmuv3_map_event(struct perf_event *event,
                                   const unsigned (*extra_event_map)
                                                  [PERF_COUNT_HW_MAX],
@@ -996,9 +1017,7 @@ static int __armv8_pmuv3_map_event(struct perf_event *event,
        int hw_event_id;
        struct arm_pmu *armpmu = to_arm_pmu(event->pmu);
 
-       hw_event_id = armpmu_map_event(event, &armv8_pmuv3_perf_map,
-                                      &armv8_pmuv3_perf_cache_map,
-                                      ARMV8_PMU_EVTYPE_EVENT);
+       hw_event_id = __armv8_pmuv3_map_event_id(armpmu, event);
 
        /*
         * CHAIN events only work when paired with an adjacent counter, and it