drm/amdkfd: Add dGPU device IDs and device info
authorFelix Kuehling <Felix.Kuehling@amd.com>
Thu, 4 Jan 2018 22:17:47 +0000 (17:17 -0500)
committerOded Gabbay <oded.gabbay@gmail.com>
Thu, 4 Jan 2018 22:17:47 +0000 (17:17 -0500)
v2: remove needs_iommu field as it doesn't exists

CC: linux-pci@vger.kernel.org
Signed-off-by: Felix Kuehling <Felix.Kuehling@amd.com>
Reviewed-by: Oded Gabbay <oded.gabbay@gmail.com>
Signed-off-by: Oded Gabbay <oded.gabbay@gmail.com>
drivers/gpu/drm/amd/amdkfd/kfd_device.c

index e8ff4ea..83d6f41 100644 (file)
@@ -57,12 +57,110 @@ static const struct kfd_device_info carrizo_device_info = {
        .needs_pci_atomics = false,
 };
 
+static const struct kfd_device_info hawaii_device_info = {
+       .asic_family = CHIP_HAWAII,
+       .max_pasid_bits = 16,
+       /* max num of queues for KV.TODO should be a dynamic value */
+       .max_no_of_hqd  = 24,
+       .ih_ring_entry_size = 4 * sizeof(uint32_t),
+       .event_interrupt_class = &event_interrupt_class_cik,
+       .num_of_watch_points = 4,
+       .mqd_size_aligned = MQD_SIZE_ALIGNED,
+       .supports_cwsr = false,
+       .needs_pci_atomics = false,
+};
+
+static const struct kfd_device_info tonga_device_info = {
+       .asic_family = CHIP_TONGA,
+       .max_pasid_bits = 16,
+       .max_no_of_hqd  = 24,
+       .ih_ring_entry_size = 4 * sizeof(uint32_t),
+       .event_interrupt_class = &event_interrupt_class_cik,
+       .num_of_watch_points = 4,
+       .mqd_size_aligned = MQD_SIZE_ALIGNED,
+       .supports_cwsr = false,
+       .needs_pci_atomics = true,
+};
+
+static const struct kfd_device_info tonga_vf_device_info = {
+       .asic_family = CHIP_TONGA,
+       .max_pasid_bits = 16,
+       .max_no_of_hqd  = 24,
+       .ih_ring_entry_size = 4 * sizeof(uint32_t),
+       .event_interrupt_class = &event_interrupt_class_cik,
+       .num_of_watch_points = 4,
+       .mqd_size_aligned = MQD_SIZE_ALIGNED,
+       .supports_cwsr = false,
+       .needs_pci_atomics = false,
+};
+
+static const struct kfd_device_info fiji_device_info = {
+       .asic_family = CHIP_FIJI,
+       .max_pasid_bits = 16,
+       .max_no_of_hqd  = 24,
+       .ih_ring_entry_size = 4 * sizeof(uint32_t),
+       .event_interrupt_class = &event_interrupt_class_cik,
+       .num_of_watch_points = 4,
+       .mqd_size_aligned = MQD_SIZE_ALIGNED,
+       .supports_cwsr = true,
+       .needs_pci_atomics = true,
+};
+
+static const struct kfd_device_info fiji_vf_device_info = {
+       .asic_family = CHIP_FIJI,
+       .max_pasid_bits = 16,
+       .max_no_of_hqd  = 24,
+       .ih_ring_entry_size = 4 * sizeof(uint32_t),
+       .event_interrupt_class = &event_interrupt_class_cik,
+       .num_of_watch_points = 4,
+       .mqd_size_aligned = MQD_SIZE_ALIGNED,
+       .supports_cwsr = true,
+       .needs_pci_atomics = false,
+};
+
+
+static const struct kfd_device_info polaris10_device_info = {
+       .asic_family = CHIP_POLARIS10,
+       .max_pasid_bits = 16,
+       .max_no_of_hqd  = 24,
+       .ih_ring_entry_size = 4 * sizeof(uint32_t),
+       .event_interrupt_class = &event_interrupt_class_cik,
+       .num_of_watch_points = 4,
+       .mqd_size_aligned = MQD_SIZE_ALIGNED,
+       .supports_cwsr = true,
+       .needs_pci_atomics = true,
+};
+
+static const struct kfd_device_info polaris10_vf_device_info = {
+       .asic_family = CHIP_POLARIS10,
+       .max_pasid_bits = 16,
+       .max_no_of_hqd  = 24,
+       .ih_ring_entry_size = 4 * sizeof(uint32_t),
+       .event_interrupt_class = &event_interrupt_class_cik,
+       .num_of_watch_points = 4,
+       .mqd_size_aligned = MQD_SIZE_ALIGNED,
+       .supports_cwsr = true,
+       .needs_pci_atomics = false,
+};
+
+static const struct kfd_device_info polaris11_device_info = {
+       .asic_family = CHIP_POLARIS11,
+       .max_pasid_bits = 16,
+       .max_no_of_hqd  = 24,
+       .ih_ring_entry_size = 4 * sizeof(uint32_t),
+       .event_interrupt_class = &event_interrupt_class_cik,
+       .num_of_watch_points = 4,
+       .mqd_size_aligned = MQD_SIZE_ALIGNED,
+       .supports_cwsr = true,
+       .needs_pci_atomics = true,
+};
+
+
 struct kfd_deviceid {
        unsigned short did;
        const struct kfd_device_info *device_info;
 };
 
-/* Please keep this sorted by increasing device id. */
 static const struct kfd_deviceid supported_devices[] = {
        { 0x1304, &kaveri_device_info },        /* Kaveri */
        { 0x1305, &kaveri_device_info },        /* Kaveri */
@@ -90,7 +188,50 @@ static const struct kfd_deviceid supported_devices[] = {
        { 0x9874, &carrizo_device_info },       /* Carrizo */
        { 0x9875, &carrizo_device_info },       /* Carrizo */
        { 0x9876, &carrizo_device_info },       /* Carrizo */
-       { 0x9877, &carrizo_device_info }        /* Carrizo */
+       { 0x9877, &carrizo_device_info },       /* Carrizo */
+       { 0x67A0, &hawaii_device_info },        /* Hawaii */
+       { 0x67A1, &hawaii_device_info },        /* Hawaii */
+       { 0x67A2, &hawaii_device_info },        /* Hawaii */
+       { 0x67A8, &hawaii_device_info },        /* Hawaii */
+       { 0x67A9, &hawaii_device_info },        /* Hawaii */
+       { 0x67AA, &hawaii_device_info },        /* Hawaii */
+       { 0x67B0, &hawaii_device_info },        /* Hawaii */
+       { 0x67B1, &hawaii_device_info },        /* Hawaii */
+       { 0x67B8, &hawaii_device_info },        /* Hawaii */
+       { 0x67B9, &hawaii_device_info },        /* Hawaii */
+       { 0x67BA, &hawaii_device_info },        /* Hawaii */
+       { 0x67BE, &hawaii_device_info },        /* Hawaii */
+       { 0x6920, &tonga_device_info },         /* Tonga */
+       { 0x6921, &tonga_device_info },         /* Tonga */
+       { 0x6928, &tonga_device_info },         /* Tonga */
+       { 0x6929, &tonga_device_info },         /* Tonga */
+       { 0x692B, &tonga_device_info },         /* Tonga */
+       { 0x692F, &tonga_vf_device_info },      /* Tonga vf */
+       { 0x6938, &tonga_device_info },         /* Tonga */
+       { 0x6939, &tonga_device_info },         /* Tonga */
+       { 0x7300, &fiji_device_info },          /* Fiji */
+       { 0x730F, &fiji_vf_device_info },       /* Fiji vf*/
+       { 0x67C0, &polaris10_device_info },     /* Polaris10 */
+       { 0x67C1, &polaris10_device_info },     /* Polaris10 */
+       { 0x67C2, &polaris10_device_info },     /* Polaris10 */
+       { 0x67C4, &polaris10_device_info },     /* Polaris10 */
+       { 0x67C7, &polaris10_device_info },     /* Polaris10 */
+       { 0x67C8, &polaris10_device_info },     /* Polaris10 */
+       { 0x67C9, &polaris10_device_info },     /* Polaris10 */
+       { 0x67CA, &polaris10_device_info },     /* Polaris10 */
+       { 0x67CC, &polaris10_device_info },     /* Polaris10 */
+       { 0x67CF, &polaris10_device_info },     /* Polaris10 */
+       { 0x67D0, &polaris10_vf_device_info },  /* Polaris10 vf*/
+       { 0x67DF, &polaris10_device_info },     /* Polaris10 */
+       { 0x67E0, &polaris11_device_info },     /* Polaris11 */
+       { 0x67E1, &polaris11_device_info },     /* Polaris11 */
+       { 0x67E3, &polaris11_device_info },     /* Polaris11 */
+       { 0x67E7, &polaris11_device_info },     /* Polaris11 */
+       { 0x67E8, &polaris11_device_info },     /* Polaris11 */
+       { 0x67E9, &polaris11_device_info },     /* Polaris11 */
+       { 0x67EB, &polaris11_device_info },     /* Polaris11 */
+       { 0x67EF, &polaris11_device_info },     /* Polaris11 */
+       { 0x67FF, &polaris11_device_info },     /* Polaris11 */
 };
 
 static int kfd_gtt_sa_init(struct kfd_dev *kfd, unsigned int buf_size,