* config/rs6000/rs6000.c (rs6000_mode_dependent_address): Allow any
offset from virtual_stack_vars_rtx and arg_pointer_rtx.
* config/rs6000/predicates.md (volatile_mem_operand): Use
offsettable_nonstrict_memref_p.
* config/rs6000/rs6000.md (*floatsidf2_internal): Remove split check.
(*floatunssidf2_internal): Likewise.
(*fix_truncdfsi2_internal): Likewise.
(*fix_trunctfsi2_internal): Likewise.
git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@149765
138bc75d-0d04-0410-961f-
82ee72b054a4
+2009-07-18 Richard Sandiford <r.sandiford@uk.ibm.com>
+
+ * config/rs6000/rs6000.c (rs6000_mode_dependent_address): Allow any
+ offset from virtual_stack_vars_rtx and arg_pointer_rtx.
+ * config/rs6000/predicates.md (volatile_mem_operand): Use
+ offsettable_nonstrict_memref_p.
+ * config/rs6000/rs6000.md (*floatsidf2_internal): Remove split check.
+ (*floatunssidf2_internal): Likewise.
+ (*fix_truncdfsi2_internal): Likewise.
+ (*fix_trunctfsi2_internal): Likewise.
+
2009-07-17 Anatoly Sokolov <aesok@post.ru>
* config/avr/avr-devices.c (avr_mcu_t): Add atmega8u2, atmega16u2 and
;; Return 1 if the operand is an offsettable memory operand.
(define_predicate "offsettable_mem_operand"
(and (match_operand 0 "memory_operand")
- (match_test "GET_RTX_CLASS (GET_CODE (XEXP (op, 0))) != RTX_AUTOINC")))
+ (match_test "offsettable_nonstrict_memref_p (op)")))
;; Return 1 if the operand is a memory operand with an address divisible by 4
(define_predicate "word_offset_memref_operand"
switch (GET_CODE (addr))
{
case PLUS:
- if (GET_CODE (XEXP (addr, 1)) == CONST_INT)
+ /* Any offset from virtual_stack_vars_rtx and arg_pointer_rtx
+ is considered a legitimate address before reload, so there
+ are no offset restrictions in that case. Note that this
+ condition is safe in strict mode because any address involving
+ virtual_stack_vars_rtx or arg_pointer_rtx would already have
+ been rejected as illegitimate. */
+ if (XEXP (addr, 0) != virtual_stack_vars_rtx
+ && XEXP (addr, 0) != arg_pointer_rtx
+ && GET_CODE (XEXP (addr, 1)) == CONST_INT)
{
unsigned HOST_WIDE_INT val = INTVAL (XEXP (addr, 1));
return val + 12 + 0x8000 >= 0x10000;
(clobber (match_operand:SI 6 "gpc_reg_operand" "=&r"))]
"! TARGET_POWERPC64 && TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT"
"#"
- "&& (can_create_pseudo_p () || offsettable_nonstrict_memref_p (operands[4]))"
+ ""
[(pc)]
"
{
(clobber (match_operand:DF 5 "gpc_reg_operand" "=&d"))]
"! TARGET_POWERPC64 && TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_DOUBLE_FLOAT"
"#"
- "&& (can_create_pseudo_p () || offsettable_nonstrict_memref_p (operands[4]))"
+ ""
[(pc)]
"
{
"(TARGET_POWER2 || TARGET_POWERPC) && TARGET_HARD_FLOAT && TARGET_FPRS
&& TARGET_DOUBLE_FLOAT"
"#"
- "&& (can_create_pseudo_p () || offsettable_nonstrict_memref_p (operands[3]))"
+ ""
[(pc)]
"
{
"!TARGET_IEEEQUAD
&& TARGET_HARD_FLOAT && TARGET_FPRS && TARGET_LONG_DOUBLE_128"
"#"
- "&& (can_create_pseudo_p () || offsettable_nonstrict_memref_p (operands[5]))"
+ ""
[(pc)]
{
rtx lowword;