Add rcr to disassembler.

Review URL: http://codereview.chromium.org/3108023

git-svn-id: http://v8.googlecode.com/svn/branches/bleeding_edge@5268 ce2b1a6d-e550-0410-aec6-3dcde31c8c00

diff --git a/src/ia32/disasm-ia32.cc b/src/ia32/disasm-ia32.cc
index dc4c27e88a1eb95c21d6256bc193a426f1faa0cb..64305ef69e9b82e84f13ed4268067f099d34b30e 100644 (file)
--- a/src/ia32/disasm-ia32.cc
+++ b/src/ia32/disasm-ia32.cc
@@ -560,6 +560,7 @@ int DisassemblerIA32::D1D3C1Instruction(byte* data) {
       case kROL: mnem = "rol"; break;
       case kROR: mnem = "ror"; break;
       case kRCL: mnem = "rcl"; break;
+      case kRCR: mnem = "rcr"; break;
       case kSHL: mnem = "shl"; break;
       case KSHR: mnem = "shr"; break;
       case kSAR: mnem = "sar"; break;

diff --git a/test/cctest/test-disasm-ia32.cc b/test/cctest/test-disasm-ia32.cc
index 40fadd8ef2c7a77e1d5090bf885200ec3b916967..25d2ec03aab366195a3ba7731b0e6c007f179f47 100644 (file)
--- a/test/cctest/test-disasm-ia32.cc
+++ b/test/cctest/test-disasm-ia32.cc
@@ -194,6 +194,8 @@ TEST(DisasmIa320) {
 
   __ rcl(edx, 1);
   __ rcl(edx, 7);
+  __ rcr(edx, 1);
+  __ rcr(edx, 7);
   __ sar(edx, 1);
   __ sar(edx, 6);
   __ sar_cl(edx);