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imx: mx6ul select SYS_L2CACHE_OFF
author
Peng Fan
<Peng.Fan@freescale.com>
Mon, 20 Jul 2015 11:28:28 +0000
(19:28 +0800)
committer
Stefano Babic
<sbabic@denx.de>
Sun, 2 Aug 2015 09:05:08 +0000
(11:05 +0200)
i.MX6UL features an Cortex-A7 core, it does not have PL310 as other i.MX6
chips. To Cortex-A7 core, If D-Cache is enabled, L2 Cache is enabled.
There is on specific switch for on/off L2 Cache, so default select
SYS_L2CACHE_OFF.
Signed-off-by: Peng Fan <Peng.Fan@freescale.com>
arch/arm/cpu/armv7/mx6/Kconfig
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diff --git
a/arch/arm/cpu/armv7/mx6/Kconfig
b/arch/arm/cpu/armv7/mx6/Kconfig
index
68b46c1
..
dce7ffc
100644
(file)
--- a/
arch/arm/cpu/armv7/mx6/Kconfig
+++ b/
arch/arm/cpu/armv7/mx6/Kconfig
@@
-25,6
+25,10
@@
config MX6SL
config MX6SX
bool
+config MX6UL
+ select SYS_L2CACHE_OFF
+ bool
+
choice
prompt "MX6 board select"
optional