MIPS: BMIPS: Use interrupt-controller node name

Changes node names of the interrupt-controller device nodes to
interrupt-controller instead of label strings.

Signed-off-by: Jaedon Shin <jaedon.shin@gmail.com>
Cc: Florian Fainelli <f.fainelli@gmail.com>
Cc: Jonas Gorski <jonas.gorski@gmail.com>
Cc: Kevin Cernekee <cernekee@gmail.com>
Cc: Rob Herring <robh+dt@kernel.org>
Cc: MIPS Mailing List <linux-mips@linux-mips.org>
Cc: devicetree@vger.kernel.org
Patchwork: https://patchwork.linux-mips.org/patch/14004/
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

diff --git a/arch/mips/boot/dts/brcm/bcm7125.dtsi b/arch/mips/boot/dts/brcm/bcm7125.dtsi
index 746ed06..bbd00f6 100644 (file)
--- a/arch/mips/boot/dts/brcm/bcm7125.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7125.dtsi
@@ -26,7 +26,7 @@
                uart0 = &uart0;
        };
 
-       cpu_intc: cpu_intc {
+       cpu_intc: interrupt-controller {
                #address-cells = <0>;
                compatible = "mti,cpu-interrupt-controller";
 
@@ -55,7 +55,7 @@
                compatible = "simple-bus";
                ranges = <0 0x10000000 0x01000000>;
 
-               periph_intc: periph_intc@441400 {
+               periph_intc: interrupt-controller@441400 {
                        compatible = "brcm,bcm7038-l1-intc";
                        reg = <0x441400 0x30>, <0x441600 0x30>;
 
@@ -66,7 +66,7 @@
                        interrupts = <2>, <3>;
                };
 
-               sun_l2_intc: sun_l2_intc@401800 {
+               sun_l2_intc: interrupt-controller@401800 {
                        compatible = "brcm,l2-intc";
                        reg = <0x401800 0x30>;
                        interrupt-controller;
@@ -87,7 +87,7 @@
                                                     "avd_0", "jtag_0";
                };
 
-               upg_irq0_intc: upg_irq0_intc@406780 {
+               upg_irq0_intc: interrupt-controller@406780 {
                        compatible = "brcm,bcm7120-l2-intc";
                        reg = <0x406780 0x8>;
 

diff --git a/arch/mips/boot/dts/brcm/bcm7346.dtsi b/arch/mips/boot/dts/brcm/bcm7346.dtsi
index 72d9cff..4bbcc95 100644 (file)
--- a/arch/mips/boot/dts/brcm/bcm7346.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7346.dtsi
@@ -26,7 +26,7 @@
                uart0 = &uart0;
        };
 
-       cpu_intc: cpu_intc {
+       cpu_intc: interrupt-controller {
                #address-cells = <0>;
                compatible = "mti,cpu-interrupt-controller";
 
@@ -55,7 +55,7 @@
                compatible = "simple-bus";
                ranges = <0 0x10000000 0x01000000>;
 
-               periph_intc: periph_intc@411400 {
+               periph_intc: interrupt-controller@411400 {
                        compatible = "brcm,bcm7038-l1-intc";
                        reg = <0x411400 0x30>, <0x411600 0x30>;
 
@@ -66,7 +66,7 @@
                        interrupts = <2>, <3>;
                };
 
-               sun_l2_intc: sun_l2_intc@403000 {
+               sun_l2_intc: interrupt-controller@403000 {
                        compatible = "brcm,l2-intc";
                        reg = <0x403000 0x30>;
                        interrupt-controller;
@@ -87,7 +87,7 @@
                                                     "jtag_0", "svd_0";
                };
 
-               upg_irq0_intc: upg_irq0_intc@406780 {
+               upg_irq0_intc: interrupt-controller@406780 {
                        compatible = "brcm,bcm7120-l2-intc";
                        reg = <0x406780 0x8>;
 
@@ -102,7 +102,7 @@
                        interrupt-names = "upg_main", "upg_bsc";
                };
 
-               upg_aon_irq0_intc: upg_aon_irq0_intc@408b80 {
+               upg_aon_irq0_intc: interrupt-controller@408b80 {
                        compatible = "brcm,bcm7120-l2-intc";
                        reg = <0x408b80 0x8>;
 

diff --git a/arch/mips/boot/dts/brcm/bcm7358.dtsi b/arch/mips/boot/dts/brcm/bcm7358.dtsi
index 7f78bfa..3e42535 100644 (file)
--- a/arch/mips/boot/dts/brcm/bcm7358.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7358.dtsi
@@ -20,7 +20,7 @@
                uart0 = &uart0;
        };
 
-       cpu_intc: cpu_intc {
+       cpu_intc: interrupt-controller {
                #address-cells = <0>;
                compatible = "mti,cpu-interrupt-controller";
 
@@ -49,7 +49,7 @@
                compatible = "simple-bus";
                ranges = <0 0x10000000 0x01000000>;
 
-               periph_intc: periph_intc@411400 {
+               periph_intc: interrupt-controller@411400 {
                        compatible = "brcm,bcm7038-l1-intc";
                        reg = <0x411400 0x30>;
 
@@ -60,7 +60,7 @@
                        interrupts = <2>;
                };
 
-               sun_l2_intc: sun_l2_intc@403000 {
+               sun_l2_intc: interrupt-controller@403000 {
                        compatible = "brcm,l2-intc";
                        reg = <0x403000 0x30>;
                        interrupt-controller;
@@ -81,7 +81,7 @@
                                                     "avd_0", "jtag_0";
                };
 
-               upg_irq0_intc: upg_irq0_intc@406600 {
+               upg_irq0_intc: interrupt-controller@406600 {
                        compatible = "brcm,bcm7120-l2-intc";
                        reg = <0x406600 0x8>;
 
@@ -96,7 +96,7 @@
                        interrupt-names = "upg_main", "upg_bsc";
                };
 
-               upg_aon_irq0_intc: upg_aon_irq0_intc@408b80 {
+               upg_aon_irq0_intc: interrupt-controller@408b80 {
                        compatible = "brcm,bcm7120-l2-intc";
                        reg = <0x408b80 0x8>;
 

diff --git a/arch/mips/boot/dts/brcm/bcm7360.dtsi b/arch/mips/boot/dts/brcm/bcm7360.dtsi
index 64b9fd9..112a557 100644 (file)
--- a/arch/mips/boot/dts/brcm/bcm7360.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7360.dtsi
@@ -20,7 +20,7 @@
                uart0 = &uart0;
        };
 
-       cpu_intc: cpu_intc {
+       cpu_intc: interrupt-controller {
                #address-cells = <0>;
                compatible = "mti,cpu-interrupt-controller";
 
@@ -49,7 +49,7 @@
                compatible = "simple-bus";
                ranges = <0 0x10000000 0x01000000>;
 
-               periph_intc: periph_intc@411400 {
+               periph_intc: interrupt-controller@411400 {
                        compatible = "brcm,bcm7038-l1-intc";
                        reg = <0x411400 0x30>;
 
@@ -60,7 +60,7 @@
                        interrupts = <2>;
                };
 
-               sun_l2_intc: sun_l2_intc@403000 {
+               sun_l2_intc: interrupt-controller@403000 {
                        compatible = "brcm,l2-intc";
                        reg = <0x403000 0x30>;
                        interrupt-controller;
@@ -81,7 +81,7 @@
                                                     "avd_0", "jtag_0";
                };
 
-               upg_irq0_intc: upg_irq0_intc@406600 {
+               upg_irq0_intc: interrupt-controller@406600 {
                        compatible = "brcm,bcm7120-l2-intc";
                        reg = <0x406600 0x8>;
 
@@ -96,7 +96,7 @@
                        interrupt-names = "upg_main", "upg_bsc";
                };
 
-               upg_aon_irq0_intc: upg_aon_irq0_intc@408b80 {
+               upg_aon_irq0_intc: interrupt-controller@408b80 {
                        compatible = "brcm,bcm7120-l2-intc";
                        reg = <0x408b80 0x8>;
 

diff --git a/arch/mips/boot/dts/brcm/bcm7362.dtsi b/arch/mips/boot/dts/brcm/bcm7362.dtsi
index 784d587..34abfb0 100644 (file)
--- a/arch/mips/boot/dts/brcm/bcm7362.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7362.dtsi
@@ -26,7 +26,7 @@
                uart0 = &uart0;
        };
 
-       cpu_intc: cpu_intc {
+       cpu_intc: interrupt-controller {
                #address-cells = <0>;
                compatible = "mti,cpu-interrupt-controller";
 
@@ -55,7 +55,7 @@
                compatible = "simple-bus";
                ranges = <0 0x10000000 0x01000000>;
 
-               periph_intc: periph_intc@411400 {
+               periph_intc: interrupt-controller@411400 {
                        compatible = "brcm,bcm7038-l1-intc";
                        reg = <0x411400 0x30>, <0x411600 0x30>;
 
@@ -66,7 +66,7 @@
                        interrupts = <2>, <3>;
                };
 
-               sun_l2_intc: sun_l2_intc@403000 {
+               sun_l2_intc: interrupt-controller@403000 {
                        compatible = "brcm,l2-intc";
                        reg = <0x403000 0x30>;
                        interrupt-controller;
@@ -87,7 +87,7 @@
                                                     "avd_0", "jtag_0";
                };
 
-               upg_irq0_intc: upg_irq0_intc@406600 {
+               upg_irq0_intc: interrupt-controller@406600 {
                        compatible = "brcm,bcm7120-l2-intc";
                        reg = <0x406600 0x8>;
 
@@ -102,7 +102,7 @@
                        interrupt-names = "upg_main", "upg_bsc";
                };
 
-               upg_aon_irq0_intc: upg_aon_irq0_intc@408b80 {
+               upg_aon_irq0_intc: interrupt-controller@408b80 {
                        compatible = "brcm,bcm7120-l2-intc";
                        reg = <0x408b80 0x8>;
 

diff --git a/arch/mips/boot/dts/brcm/bcm7420.dtsi b/arch/mips/boot/dts/brcm/bcm7420.dtsi
index 0d391d7..b143723 100644 (file)
--- a/arch/mips/boot/dts/brcm/bcm7420.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7420.dtsi
@@ -26,7 +26,7 @@
                uart0 = &uart0;
        };
 
-       cpu_intc: cpu_intc {
+       cpu_intc: interrupt-controller {
                #address-cells = <0>;
                compatible = "mti,cpu-interrupt-controller";
 
@@ -55,7 +55,7 @@
                compatible = "simple-bus";
                ranges = <0 0x10000000 0x01000000>;
 
-               periph_intc: periph_intc@441400 {
+               periph_intc: interrupt-controller@441400 {
                        compatible = "brcm,bcm7038-l1-intc";
                        reg = <0x441400 0x30>, <0x441600 0x30>;
 
@@ -66,7 +66,7 @@
                        interrupts = <2>, <3>;
                };
 
-               sun_l2_intc: sun_l2_intc@401800 {
+               sun_l2_intc: interrupt-controller@401800 {
                        compatible = "brcm,l2-intc";
                        reg = <0x401800 0x30>;
                        interrupt-controller;
@@ -88,7 +88,7 @@
                                                     "jtag_0";
                };
 
-               upg_irq0_intc: upg_irq0_intc@406780 {
+               upg_irq0_intc: interrupt-controller@406780 {
                        compatible = "brcm,bcm7120-l2-intc";
                        reg = <0x406780 0x8>;
 

diff --git a/arch/mips/boot/dts/brcm/bcm7425.dtsi b/arch/mips/boot/dts/brcm/bcm7425.dtsi
index 7124c98..2488d2f 100644 (file)
--- a/arch/mips/boot/dts/brcm/bcm7425.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7425.dtsi
@@ -26,7 +26,7 @@
                uart0 = &uart0;
        };
 
-       cpu_intc: cpu_intc {
+       cpu_intc: interrupt-controller {
                #address-cells = <0>;
                compatible = "mti,cpu-interrupt-controller";
 
@@ -55,7 +55,7 @@
                compatible = "simple-bus";
                ranges = <0 0x10000000 0x01000000>;
 
-               periph_intc: periph_intc@41a400 {
+               periph_intc: interrupt-controller@41a400 {
                        compatible = "brcm,bcm7038-l1-intc";
                        reg = <0x41a400 0x30>, <0x41a600 0x30>;
 
@@ -66,7 +66,7 @@
                        interrupts = <2>, <3>;
                };
 
-               sun_l2_intc: sun_l2_intc@403000 {
+               sun_l2_intc: interrupt-controller@403000 {
                        compatible = "brcm,l2-intc";
                        reg = <0x403000 0x30>;
                        interrupt-controller;
@@ -89,7 +89,7 @@
                                                     "vice_0";
                };
 
-               upg_irq0_intc: upg_irq0_intc@406780 {
+               upg_irq0_intc: interrupt-controller@406780 {
                        compatible = "brcm,bcm7120-l2-intc";
                        reg = <0x406780 0x8>;
 
@@ -104,7 +104,7 @@
                        interrupt-names = "upg_main", "upg_bsc";
                };
 
-               upg_aon_irq0_intc: upg_aon_irq0_intc@409480 {
+               upg_aon_irq0_intc: interrupt-controller@409480 {
                        compatible = "brcm,bcm7120-l2-intc";
                        reg = <0x409480 0x8>;
 

diff --git a/arch/mips/boot/dts/brcm/bcm7435.dtsi b/arch/mips/boot/dts/brcm/bcm7435.dtsi
index a364896..19fa259 100644 (file)
--- a/arch/mips/boot/dts/brcm/bcm7435.dtsi
+++ b/arch/mips/boot/dts/brcm/bcm7435.dtsi
@@ -38,7 +38,7 @@
                uart0 = &uart0;
        };
 
-       cpu_intc: cpu_intc {
+       cpu_intc: interrupt-controller {
                #address-cells = <0>;
                compatible = "mti,cpu-interrupt-controller";
 
@@ -67,7 +67,7 @@
                compatible = "simple-bus";
                ranges = <0 0x10000000 0x01000000>;
 
-               periph_intc: periph_intc@41b500 {
+               periph_intc: interrupt-controller@41b500 {
                        compatible = "brcm,bcm7038-l1-intc";
                        reg = <0x41b500 0x40>, <0x41b600 0x40>,
                                <0x41b700 0x40>, <0x41b800 0x40>;
@@ -79,7 +79,7 @@
                        interrupts = <2>, <3>, <2>, <3>;
                };
 
-               sun_l2_intc: sun_l2_intc@403000 {
+               sun_l2_intc: interrupt-controller@403000 {
                        compatible = "brcm,l2-intc";
                        reg = <0x403000 0x30>;
                        interrupt-controller;
@@ -104,7 +104,7 @@
                                                     "scpu";
                };
 
-               upg_irq0_intc: upg_irq0_intc@406780 {
+               upg_irq0_intc: interrupt-controller@406780 {
                        compatible = "brcm,bcm7120-l2-intc";
                        reg = <0x406780 0x8>;
 
@@ -119,7 +119,7 @@
                        interrupt-names = "upg_main", "upg_bsc";
                };
 
-               upg_aon_irq0_intc: upg_aon_irq0_intc@409480 {
+               upg_aon_irq0_intc: interrupt-controller@409480 {
                        compatible = "brcm,bcm7120-l2-intc";
                        reg = <0x409480 0x8>;