AMDGPU: Remove deprecated llvm.AMDGPU.kilp intrinsic

Summary: This is no longer used by mesa since its 18.0.0 release.

Reviewers: nhaehnle

Reviewed By: nhaehnle

Subscribers: arsenm, kzhuravl, wdng, yaxunl, dstuttard, tpr, llvm-commits, t-tye

Differential Revision: https://reviews.llvm.org/D45988

llvm-svn: 330775

diff --git a/llvm/lib/Target/AMDGPU/AMDGPUIntrinsics.td b/llvm/lib/Target/AMDGPU/AMDGPUIntrinsics.td
index 18c9bd9..63d661a 100644 (file)
--- a/llvm/lib/Target/AMDGPU/AMDGPUIntrinsics.td
+++ b/llvm/lib/Target/AMDGPU/AMDGPUIntrinsics.td
@@ -13,7 +13,6 @@
 
 let TargetPrefix = "AMDGPU", isTarget = 1 in {
   def int_AMDGPU_kill : Intrinsic<[], [llvm_float_ty], []>;
-  def int_AMDGPU_kilp : Intrinsic<[], [], []>;
 }
 
 include "SIIntrinsics.td"

diff --git a/llvm/lib/Target/AMDGPU/R600Instructions.td b/llvm/lib/Target/AMDGPU/R600Instructions.td
index 664a690..2c628d0 100644 (file)
--- a/llvm/lib/Target/AMDGPU/R600Instructions.td
+++ b/llvm/lib/Target/AMDGPU/R600Instructions.td
@@ -1739,11 +1739,6 @@ def : R600Pat <
 >;
 
 // KIL Patterns
-def KILP : R600Pat <
-  (int_AMDGPU_kilp),
-  (MASK_WRITE (KILLGT (f32 ONE), (f32 ZERO)))
->;
-
 def KIL : R600Pat <
   (int_AMDGPU_kill f32:$src0),
   (MASK_WRITE (KILLGT (f32 ZERO), $src0))

diff --git a/llvm/lib/Target/AMDGPU/SIInstructions.td b/llvm/lib/Target/AMDGPU/SIInstructions.td
index f4e4429..e9b6e78 100644 (file)
--- a/llvm/lib/Target/AMDGPU/SIInstructions.td
+++ b/llvm/lib/Target/AMDGPU/SIInstructions.td
@@ -572,11 +572,6 @@ def : GCNPat<
   (SI_ELSE $src, $target, 0)
 >;
 
-def : GCNPat <
-  (int_AMDGPU_kilp),
-  (SI_KILL_I1_PSEUDO (i1 0), 0)
->;
-
 def : Pat <
   // -1.0 as i32 (LowerINTRINSIC_VOID converts all other constants to -1.0)
   (AMDGPUkill (i32 -1082130432)),

diff --git a/llvm/test/CodeGen/AMDGPU/llvm.amdgpu.kilp.ll b/llvm/test/CodeGen/AMDGPU/llvm.amdgpu.kilp.ll
deleted file mode 100644 (file)
index 6b865d8..0000000
--- a/llvm/test/CodeGen/AMDGPU/llvm.amdgpu.kilp.ll
+++ /dev/null
@@ -1,19 +0,0 @@
-; RUN: llc -march=amdgcn -mcpu=verde -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
-; RUN: llc -march=amdgcn -mcpu=tonga -verify-machineinstrs < %s | FileCheck -check-prefix=SI %s
-
-; SI-LABEL: {{^}}kilp_gs_const:
-; SI: s_mov_b64 exec, 0
-define amdgpu_gs void @kilp_gs_const() {
-main_body:
-  %0 = icmp ule i32 0, 3
-  %1 = select i1 %0, float 1.000000e+00, float -1.000000e+00
-  call void @llvm.AMDGPU.kilp(float %1)
-  %2 = icmp ule i32 3, 0
-  %3 = select i1 %2, float 1.000000e+00, float -1.000000e+00
-  call void @llvm.AMDGPU.kilp(float %3)
-  ret void
-}
-
-declare void @llvm.AMDGPU.kilp(float)
-
-!0 = !{!"const", null, i32 1}

diff --git a/llvm/test/CodeGen/AMDGPU/si-lower-control-flow-kill.ll b/llvm/test/CodeGen/AMDGPU/si-lower-control-flow-kill.ll
index d422510..5547bb2 100644 (file)
--- a/llvm/test/CodeGen/AMDGPU/si-lower-control-flow-kill.ll
+++ b/llvm/test/CodeGen/AMDGPU/si-lower-control-flow-kill.ll
@@ -9,7 +9,7 @@ define amdgpu_ps void @if_with_kill(i32 %arg) {
   br i1 %cmp, label %then, label %endif
 
 then:
-  tail call void @llvm.AMDGPU.kilp()
+  tail call void @llvm.amdgcn.kill(i1 false)
   br label %endif
 
 endif:
@@ -35,7 +35,7 @@ loop:
   br i1 %cc, label %loop, label %break
 
 break:
-  tail call void @llvm.AMDGPU.kilp()
+  tail call void @llvm.amdgcn.kill(i1 false)
   br label %endif
 
 endif:
@@ -58,7 +58,7 @@ loop:
   %ind = phi i32 [%sub, %then], [%dec, %loop]
   %dec = sub i32 %ind, 1
   %cc = icmp ne i32 %ind, 0
-  tail call void @llvm.AMDGPU.kilp()
+  tail call void @llvm.amdgcn.kill(i1 false)
   br i1 %cc, label %loop, label %break
 
 break:
@@ -68,4 +68,6 @@ endif:
   ret void
 }
 
-declare void @llvm.AMDGPU.kilp()
+declare void @llvm.amdgcn.kill(i1) #0
+
+attributes #0 = { nounwind }