In the commit, "PM / devfreq: update the name of EXYNOS clock register"
ommitted one register.
Signed-off-by: MyungJoo Ham <myungjoo.ham@samsung.com>
Signed-off-by: Kukjin Kim <kgene.kim@samsung.com>
int ret;
/* Enable pause function for DREX2 DVFS */
- tmp = __raw_readl(S5P_DMC_PAUSE_CTRL);
- tmp |= DMC_PAUSE_ENABLE;
- __raw_writel(tmp, S5P_DMC_PAUSE_CTRL);
+ tmp = __raw_readl(EXYNOS4_DMC_PAUSE_CTRL);
+ tmp |= EXYNOS4_DMC_PAUSE_ENABLE;
+ __raw_writel(tmp, EXYNOS4_DMC_PAUSE_CTRL);
tmp = __raw_readl(EXYNOS4_CLKDIV_DMC0);