drm/i915/gtt: Store scratch page size alongside not in the common struct

As the scratch page is the only one to be allocated with variable size,
rather than keep an unused slot in all i915_page_table structs, store it
alongside the vm->scratch_page.

Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Cc: Matthew Auld <matthew.auld@intel.com>
Cc: Mika Kuoppala <mika.kuoppala@intel.com>
Reviewed-by: Matthew Auld <matthew.auld@intel.com>
Link: https://patchwork.freedesktop.org/patch/msgid/20190305135430.4948-1-chris@chris-wilson.co.uk

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.c b/drivers/gpu/drm/i915/i915_gem_gtt.c
index f97cc7b..4a681b3 100644 (file)
--- a/drivers/gpu/drm/i915/i915_gem_gtt.c
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.c
@@ -613,7 +613,7 @@ setup_scratch_page(struct i915_address_space *vm, gfp_t gfp)
 
                vm->scratch_page.page = page;
                vm->scratch_page.daddr = addr;
-               vm->scratch_page.order = order;
+               vm->scratch_order = order;
                return 0;
 
 unmap_page:
@@ -632,10 +632,11 @@ skip:
 static void cleanup_scratch_page(struct i915_address_space *vm)
 {
        struct i915_page_dma *p = &vm->scratch_page;
+       int order = vm->scratch_order;
 
-       dma_unmap_page(vm->dma, p->daddr, BIT(p->order) << PAGE_SHIFT,
+       dma_unmap_page(vm->dma, p->daddr, BIT(order) << PAGE_SHIFT,
                       PCI_DMA_BIDIRECTIONAL);
-       __free_pages(p->page, p->order);
+       __free_pages(p->page, order);
 }
 
 static struct i915_page_table *alloc_pt(struct i915_address_space *vm)
@@ -1216,7 +1217,7 @@ static int gen8_init_scratch(struct i915_address_space *vm)
 
                GEM_BUG_ON(!clone->has_read_only);
 
-               vm->scratch_page.order = clone->scratch_page.order;
+               vm->scratch_order = clone->scratch_order;
                vm->scratch_pte = clone->scratch_pte;
                vm->scratch_pt  = clone->scratch_pt;
                vm->scratch_pd  = clone->scratch_pd;

diff --git a/drivers/gpu/drm/i915/i915_gem_gtt.h b/drivers/gpu/drm/i915/i915_gem_gtt.h
index 03ade71..86065d7 100644 (file)
--- a/drivers/gpu/drm/i915/i915_gem_gtt.h
+++ b/drivers/gpu/drm/i915/i915_gem_gtt.h
@@ -213,7 +213,6 @@ struct i915_vma;
 
 struct i915_page_dma {
        struct page *page;
-       int order;
        union {
                dma_addr_t daddr;
 
@@ -293,6 +292,7 @@ struct i915_address_space {
 #define VM_CLASS_PPGTT 1
 
        u64 scratch_pte;
+       int scratch_order;
        struct i915_page_dma scratch_page;
        struct i915_page_table *scratch_pt;
        struct i915_page_directory *scratch_pd;
@@ -356,7 +356,7 @@ i915_vm_is_48bit(const struct i915_address_space *vm)
 static inline bool
 i915_vm_has_scratch_64K(struct i915_address_space *vm)
 {
-       return vm->scratch_page.order == get_order(I915_GTT_PAGE_SIZE_64K);
+       return vm->scratch_order == get_order(I915_GTT_PAGE_SIZE_64K);
 }
 
 /* The Graphics Translation Table is the way in which GEN hardware translates a