ARM: dts: sunxi: Fix DE2 clocks register range
authorJernej Skrabec <jernej.skrabec@siol.net>
Fri, 24 Jan 2020 23:20:09 +0000 (00:20 +0100)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Thu, 23 Apr 2020 08:36:43 +0000 (10:36 +0200)
commit da180322582bd9db07f29e6d4a2d170afde0703f upstream.

As it can be seen from DE2 manual, clock range is 0x10000.

Fix it.

Signed-off-by: Jernej Skrabec <jernej.skrabec@siol.net>
Fixes: 73f122c82775 ("ARM: dts: sun8i: a83t: Add display pipeline")
Fixes: 05a43a262d03 ("ARM: dts: sun8i: r40: Add HDMI pipeline")
Fixes: 21b299209330 ("ARM: sun8i: v3s: add device nodes for DE2 display pipeline")
Fixes: d8c6f1f0295c ("ARM: sun8i: h3/h5: add DE2 CCU device node for H3")
[wens@csie.org: added fixes tags]
Signed-off-by: Chen-Yu Tsai <wens@csie.org>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
arch/arm/boot/dts/sun8i-a83t.dtsi
arch/arm/boot/dts/sun8i-r40.dtsi
arch/arm/boot/dts/sun8i-v3s.dtsi
arch/arm/boot/dts/sunxi-h3-h5.dtsi

index 74bb053..4e485e4 100644 (file)
 
                display_clocks: clock@1000000 {
                        compatible = "allwinner,sun8i-a83t-de2-clk";
-                       reg = <0x01000000 0x100000>;
+                       reg = <0x01000000 0x10000>;
                        clocks = <&ccu CLK_BUS_DE>,
                                 <&ccu CLK_PLL_DE>;
                        clock-names = "bus",
index 80f4dc3..3394026 100644 (file)
                display_clocks: clock@1000000 {
                        compatible = "allwinner,sun8i-r40-de2-clk",
                                     "allwinner,sun8i-h3-de2-clk";
-                       reg = <0x01000000 0x100000>;
+                       reg = <0x01000000 0x10000>;
                        clocks = <&ccu CLK_BUS_DE>,
                                 <&ccu CLK_DE>;
                        clock-names = "bus",
index 23ba56d..2abcba3 100644 (file)
 
                display_clocks: clock@1000000 {
                        compatible = "allwinner,sun8i-v3s-de2-clk";
-                       reg = <0x01000000 0x100000>;
+                       reg = <0x01000000 0x10000>;
                        clocks = <&ccu CLK_BUS_DE>,
                                 <&ccu CLK_DE>;
                        clock-names = "bus",
index 107eeaf..b3141c9 100644 (file)
 
                display_clocks: clock@1000000 {
                        /* compatible is in per SoC .dtsi file */
-                       reg = <0x01000000 0x100000>;
+                       reg = <0x01000000 0x10000>;
                        clocks = <&ccu CLK_BUS_DE>,
                                 <&ccu CLK_DE>;
                        clock-names = "bus",