drm/msm/disp/dpu1: fix display underruns during modeset.

During crtc disable, display perf structures are reset to 0
which includes state varibles which are immutable. On crtc
enable, we use the same structures and they don't refelect
the actual values

1) Fix is to avoid updating the state structures during disable.
2) Reset the perf structures during atomic check when there is no
modeset enable.

Signed-off-by: Kalyan Thota <kalyan_t@codeaurora.org>
Reported-by: Stephen Boyd <swboyd@chromium.org>
Tested-by: Douglas Anderson <dianders@chromium.org>
Link: https://lore.kernel.org/r/1616158446-19290-1-git-send-email-kalyan_t@codeaurora.org
Signed-off-by: Rob Clark <robdclark@chromium.org>

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
index b6b3bba..7cba5bb 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_core_perf.c
@@ -380,7 +380,6 @@ int dpu_core_perf_crtc_update(struct drm_crtc *crtc,
        } else {
                DPU_DEBUG("crtc=%d disable\n", crtc->base.id);
                memset(old, 0, sizeof(*old));
-               memset(new, 0, sizeof(*new));
                update_bus = true;
                update_clk = true;
        }

diff --git a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
index 8602b85..5a74f93 100644 (file)
--- a/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
+++ b/drivers/gpu/drm/msm/disp/dpu1/dpu_crtc.c
@@ -923,6 +923,7 @@ static int dpu_crtc_atomic_check(struct drm_crtc *crtc,
                DPU_DEBUG("crtc%d -> enable %d, active %d, skip atomic_check\n",
                                crtc->base.id, crtc_state->enable,
                                crtc_state->active);
+               memset(&cstate->new_perf, 0, sizeof(cstate->new_perf));
                goto end;
        }