2015-04-09 Kugan Vivekanandarajah <kugan.vivekanandarajah@linaro.org>
authorkugan <kugan@138bc75d-0d04-0410-961f-82ee72b054a4>
Wed, 8 Apr 2015 21:37:47 +0000 (21:37 +0000)
committerkugan <kugan@138bc75d-0d04-0410-961f-82ee72b054a4>
Wed, 8 Apr 2015 21:37:47 +0000 (21:37 +0000)
Backport from trunk r219745.
2015-01-16  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
            Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>

PR target/64263
* config/aarch64/aarch64.md (*movsi_aarch64): Don't split if the
destination is not a GP reg.
(*movdi_aarch64): Likewise.

2015-04-09  Kugan Vivekanandarajah  <kugan.vivekanandarajah@linaro.org>

Backport from trunk r219745.
2015-01-16  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>

PR target/64263
* gcc.target/aarch64/pr64263_1.c: New test.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/branches/linaro/gcc-4_9-branch@221936 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/ChangeLog.linaro
gcc/config/aarch64/aarch64.md
gcc/testsuite/ChangeLog.linaro
gcc/testsuite/gcc.target/aarch64/pr64263_1.c [new file with mode: 0644]

index c72f812..3330179 100644 (file)
@@ -1,5 +1,16 @@
 2015-04-09  Kugan Vivekanandarajah  <kugan.vivekanandarajah@linaro.org>
 
+       Backport from trunk r219745.
+       2015-01-16  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+            Ramana Radhakrishnan <ramana.radhakrishnan@arm.com>
+
+       PR target/64263
+       * config/aarch64/aarch64.md (*movsi_aarch64): Don't split if the
+       destination is not a GP reg.
+       (*movdi_aarch64): Likewise.
+
+2015-04-09  Kugan Vivekanandarajah  <kugan.vivekanandarajah@linaro.org>
+
        Backport from trunk r219578.
        2015-01-14  Joey Ye  <joey.ye@arm.com>
 
index e96fcf9..00a60b5 100644 (file)
    fmov\\t%s0, %w1
    fmov\\t%w0, %s1
    fmov\\t%s0, %s1"
-   "CONST_INT_P (operands[1]) && !aarch64_move_imm (INTVAL (operands[1]), SImode)"
+   "CONST_INT_P (operands[1]) && !aarch64_move_imm (INTVAL (operands[1]), SImode)
+    && GP_REGNUM_P (REGNO (operands[0]))"
    [(const_int 0)]
    "{
        aarch64_expand_mov_immediate (operands[0], operands[1]);
    fmov\\t%x0, %d1
    fmov\\t%d0, %d1
    movi\\t%d0, %1"
-   "(CONST_INT_P (operands[1]) && !aarch64_move_imm (INTVAL (operands[1]), DImode))"
+   "(CONST_INT_P (operands[1]) && !aarch64_move_imm (INTVAL (operands[1]), DImode))
+    && GP_REGNUM_P (REGNO (operands[0]))"
    [(const_int 0)]
    "{
        aarch64_expand_mov_immediate (operands[0], operands[1]);
index b6a7538..4de6c1b 100644 (file)
@@ -1,3 +1,11 @@
+2015-04-09  Kugan Vivekanandarajah  <kugan.vivekanandarajah@linaro.org>
+
+       Backport from trunk r219745.
+       2015-01-16  Kyrylo Tkachov  <kyrylo.tkachov@arm.com>
+
+       PR target/64263
+       * gcc.target/aarch64/pr64263_1.c: New test.
+
 2015-04-07  Yvan Roux  <yvan.roux@linaro.org>
 
        Backport from trunk r218658.
diff --git a/gcc/testsuite/gcc.target/aarch64/pr64263_1.c b/gcc/testsuite/gcc.target/aarch64/pr64263_1.c
new file mode 100644 (file)
index 0000000..047e623
--- /dev/null
@@ -0,0 +1,23 @@
+/* { dg-do compile } */
+/* { dg-options "-O1" } */
+
+#include "arm_neon.h"
+
+extern long int vget_lane_s64_1 (int64x1_t, const int);
+
+void
+foo ()
+{
+  int8x8_t val14;
+  int8x8_t val15;
+  uint8x8_t val16;
+  uint32x4_t val40;
+  val14 = vcreate_s8 (0xff0080f6807f807fUL);
+  val15 = vcreate_s8 (0x10807fff7f808080UL);
+  val16 = vcgt_s8 (val14, val15);
+  val40 = vreinterpretq_u32_u64 (
+    vdupq_n_u64 (
+         vget_lane_s64_1 (
+         vreinterpret_s64_u8 (val16), 0)
+    ));
+}