clk: tegra: Use readl_relaxed_poll_timeout_atomic() in tegra210_clock_init()
authorNicolin Chen <nicoleotsuka@gmail.com>
Fri, 15 Sep 2017 19:10:13 +0000 (12:10 -0700)
committerGreg Kroah-Hartman <gregkh@linuxfoundation.org>
Wed, 20 Dec 2017 09:10:28 +0000 (10:10 +0100)
[ Upstream commit 22ef01a203d27fee8b7694020b7e722db7efd2a7 ]

Below is the call trace of tegra210_init_pllu() function:
  start_kernel()
  -> time_init()
  --> of_clk_init()
  ---> tegra210_clock_init()
  ----> tegra210_pll_init()
  -----> tegra210_init_pllu()

Because the preemption is disabled in the start_kernel before calling
time_init, tegra210_init_pllu is actually in an atomic context while
it includes a readl_relaxed_poll_timeout that might sleep.

So this patch just changes this readl_relaxed_poll_timeout() to its
atomic version.

Signed-off-by: Nicolin Chen <nicoleotsuka@gmail.com>
Acked-By: Peter De Schrijver <pdeschrijver@nvidia.com>
Signed-off-by: Thierry Reding <treding@nvidia.com>
Signed-off-by: Sasha Levin <alexander.levin@verizon.com>
Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drivers/clk/tegra/clk-tegra210.c

index 6d7a613..b928678 100644 (file)
@@ -2566,8 +2566,8 @@ static int tegra210_enable_pllu(void)
        reg |= PLL_ENABLE;
        writel(reg, clk_base + PLLU_BASE);
 
-       readl_relaxed_poll_timeout(clk_base + PLLU_BASE, reg,
-                                  reg & PLL_BASE_LOCK, 2, 1000);
+       readl_relaxed_poll_timeout_atomic(clk_base + PLLU_BASE, reg,
+                                         reg & PLL_BASE_LOCK, 2, 1000);
        if (!(reg & PLL_BASE_LOCK)) {
                pr_err("Timed out waiting for PLL_U to lock\n");
                return -ETIMEDOUT;