nvmem-cells = <&tsens_calib>, <&tsens_backup>;
nvmem-cell-names = "calib", "calib_backup";
#clock-cells = <1>;
+ #power-domain-cells = <1>;
#reset-cells = <1>;
#thermal-sensor-cells = <1>;
};
compatible = "qcom,mmcc-apq8064";
reg = <0x4000000 0x1000>;
#clock-cells = <1>;
+ #power-domain-cells = <1>;
#reset-cells = <1>;
};
gcc: clock-controller@1800000 {
compatible = "qcom,gcc-ipq4019";
#clock-cells = <1>;
+ #power-domain-cells = <1>;
#reset-cells = <1>;
reg = <0x1800000 0x60000>;
};
gcc: clock-controller@900000 {
compatible = "qcom,gcc-mdm9615";
#clock-cells = <1>;
+ #power-domain-cells = <1>;
#reset-cells = <1>;
reg = <0x900000 0x4000>;
};
gcc: clock-controller@900000 {
compatible = "qcom,gcc-msm8660";
#clock-cells = <1>;
+ #power-domain-cells = <1>;
#reset-cells = <1>;
reg = <0x900000 0x4000>;
};
gcc: clock-controller@900000 {
compatible = "qcom,gcc-msm8960";
#clock-cells = <1>;
+ #power-domain-cells = <1>;
#reset-cells = <1>;
reg = <0x900000 0x4000>;
};
compatible = "qcom,mmcc-msm8960";
reg = <0x4000000 0x1000>;
#clock-cells = <1>;
+ #power-domain-cells = <1>;
#reset-cells = <1>;
};