+Wed Jul 29 22:18:14 1998 David Edelsohn <edelsohn@mhpcc.edu>
+
+ * rs6000/rs6000.md (absdi2 define_split): Swap operands of MINUS.
+ * rs6000/rs6000.c (mask64_operand): Use HOST_BITS_PER_WIDE_INT.
+ (print_operand, case 'B'): Don't fall through.
+ (print_operand, case 'S'): Correct mask begin/end computation.
+ Use HOST_BITS_PER_WIDE_INT.
+ * rs6000/rs6000.h (CPP_PREDEFINES): Define _LONG_LONG.
+ (CONDITIONAL_REGISTER_USAGE): GPR13 fixed if TARGET_64BIT.
+ * rs6000/aix41.h (CPP_PREDEFINES): Same.
+ * rs6000/aix43.h (CPP_PREDEFINES): Same.
+
Wed Jul 29 11:47:10 1998 Nick Clifton <nickc@cygnus.com>
* config/arm/thumb.md (extendqisi2_insn): Remove earlyclobber
if (((c >>= 1) & 1) != last_bit_value)
last_bit_value ^= 1, transitions++;
-#if HOST_BITS_PER_INT == 32
+#if HOST_BITS_PER_WIDE_INT == 32
/* Consider CONST_INT sign-extended. */
transitions += (last_bit_value != 1);
#endif
&& (mode == VOIDmode || mode == DImode))
{
HOST_WIDE_INT low = CONST_DOUBLE_LOW (op);
-#if HOST_BITS_PER_INT == 32
+#if HOST_BITS_PER_WIDE_INT == 32
HOST_WIDE_INT high = CONST_DOUBLE_HIGH (op);
#endif
int i;
int transitions = 0;
if ((low == 0
-#if HOST_BITS_PER_INT == 32
+#if HOST_BITS_PER_WIDE_INT == 32
&& high == 0
#endif
)
|| (low == ~0
-#if HOST_BITS_PER_INT == 32
+#if HOST_BITS_PER_WIDE_INT == 32
&& high == ~0
#endif
))
if (((low >>= 1) & 1) != last_bit_value)
last_bit_value ^= 1, transitions++;
-#if HOST_BITS_PER_INT == 32
+#if HOST_BITS_PER_WIDE_INT == 32
if ((high & 1) != last_bit_value)
last_bit_value ^= 1, transitions++;
/* If the low-order bit is zero, write 'r'; otherwise, write 'l'
for 64-bit mask direction. */
putc (((INT_LOWPART(x) & 1) == 0 ? 'r' : 'l'), file);
+ return;
case 'C':
/* This is an optional cror needed for LE or GE floating-point
if (val & 1) /* Clear Left */
{
- if (val == 1)
- i = 0;
- else
- for (i = 1; i < HOST_BITS_PER_WIDE_INT; i++)
- if (!((val >>= 1) & 1))
- break;
+ for (i = 0; i < HOST_BITS_PER_WIDE_INT; i++)
+ if (!((val >>= 1) & 1))
+ break;
-#if HOST_BITS_PER_INT == 32
- if (GET_CODE (x) == CONST_DOUBLE && i == 32)
- {
- val = CONST_DOUBLE_HIGH (x);
+#if HOST_BITS_PER_WIDE_INT == 32
+ if (GET_CODE (x) == CONST_DOUBLE && i == 32)
+ {
+ val = CONST_DOUBLE_HIGH (x);
- if (val == 0)
- --i;
- else if (val == 1)
- ;
- else
- for (i = 33; i < 64; i++)
- if (!((val >>= 1) & 1))
- break;
- }
+ if (val == 0)
+ --i;
+ else
+ for (i = 32; i < 64; i++)
+ if (!((val >>= 1) & 1))
+ break;
+ }
#endif
+ /* i = index of last set bit from right
+ mask begins at 63 - i from left */
+ if (i > 63)
+ output_operand_lossage ("%%S computed all 1's mask");
fprintf (file, "%d", 63 - i);
return;
}
else /* Clear Right */
{
- val = (GET_CODE (x) == CONST_INT ? INTVAL (x) : CONST_DOUBLE_HIGH (x));
-
- if (val == (-1 << (HOST_BITS_PER_WIDE_INT-1)))
- i = 0;
- else
- for (i = 1; i < HOST_BITS_PER_WIDE_INT; i++)
- if ((val <<= 1) < 0)
- break;
+ for (i = 0; i < HOST_BITS_PER_WIDE_INT; i++)
+ if ((val >>= 1) & 1)
+ break;
-#if HOST_BITS_PER_INT == 32
+#if HOST_BITS_PER_WIDE_INT == 32
if (GET_CODE (x) == CONST_DOUBLE && i == 32)
{
- val = CONST_DOUBLE_LOW (x);
+ val = CONST_DOUBLE_HIGH (x);
- if (val == 0)
+ if (val == (HOST_WIDE_INT) -1)
--i;
- else if (val == (-1 << (HOST_BITS_PER_WIDE_INT-1)))
- ;
else
- for (i = 33; i < 64; i++)
- if ((val <<= 1) < 0)
+ for (i = 32; i < 64; i++)
+ if ((val >>= 1) & 1)
break;
}
#endif
- fprintf (file, "%d", i);
+ /* i = index of last clear bit from right
+ mask ends at 62 - i from left */
+ if (i > 62)
+ output_operand_lossage ("%%S computed all 0's mask");
+ fprintf (file, "%d", 62 - i);
return;
}
/* Names to predefine in the preprocessor for this target machine. */
-#define CPP_PREDEFINES "-D_IBMR2 -D_POWER -D_AIX -D_AIX32 \
+#define CPP_PREDEFINES "-D_IBMR2 -D_POWER -D_AIX -D_AIX32 -D_LONG_LONG \
-Asystem(unix) -Asystem(aix) -Acpu(rs6000) -Amachine(rs6000)"
/* Print subsidiary information on the compiler version in use. */
/* Define this macro to change register usage conditional on target flags.
Set MQ register fixed (already call_used) if not POWER architecture
(RIOS1, RIOS2, RSC, and PPC601) so that it will not be allocated.
+ 64-bit AIX reserves GPR13 for thread-private data.
Conditionally disable FPRs. */
#define CONDITIONAL_REGISTER_USAGE \
{ \
if (! TARGET_POWER) \
fixed_regs[64] = 1; \
+ if (TARGET_64BIT) \
+ fixed_regs[13] = call_used_regs[13] = 1; \
if (TARGET_SOFT_FLOAT) \
for (i = 32; i < 64; i++) \
fixed_regs[i] = call_used_regs[i] = 1; \