2012-03-27 Tristan Gingold <gingold@adacore.com>
authorgingold <gingold@138bc75d-0d04-0410-961f-82ee72b054a4>
Tue, 27 Mar 2012 09:44:00 +0000 (09:44 +0000)
committergingold <gingold@138bc75d-0d04-0410-961f-82ee72b054a4>
Tue, 27 Mar 2012 09:44:00 +0000 (09:44 +0000)
* config/ia64/vms.h (CASE_VECTOR_MODE): Define.
* config/ia64/ia64.md: Remove mode in template.
Sign extend operand in expand_simple_binop.
* config/ia64/ia64.h (ASM_OUTPUT_ADDR_DIFF_ELT): Use
CASE_VECTOR_MODE instead of TARGET_ILP32.
(ADDR_VEC_ALIGN): Make it depends on CASE_VECTOR_MODE.

git-svn-id: svn+ssh://gcc.gnu.org/svn/gcc/trunk@185851 138bc75d-0d04-0410-961f-82ee72b054a4

gcc/ChangeLog
gcc/config/ia64/ia64.h
gcc/config/ia64/ia64.md
gcc/config/ia64/vms.h

index 7452da9..8321a8e 100644 (file)
@@ -1,3 +1,12 @@
+2012-03-27  Tristan Gingold  <gingold@adacore.com>
+
+       * config/ia64/vms.h (CASE_VECTOR_MODE): Define.
+       * config/ia64/ia64.md: Remove mode in template.
+       Sign extend operand in expand_simple_binop.
+       * config/ia64/ia64.h (ASM_OUTPUT_ADDR_DIFF_ELT): Use
+       CASE_VECTOR_MODE instead of TARGET_ILP32.
+       (ADDR_VEC_ALIGN): Make it depends on CASE_VECTOR_MODE.
+
 2012-03-26  Steven Bosscher  <steven@gcc.gnu.org>
 
        * varasm.c (assemble_external): #if 0 out the new assert from the
index a3ccd6f..2f0a929 100644 (file)
@@ -1484,15 +1484,15 @@ do {                                                                    \
 
 #define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL)     \
   do {                                                         \
-  if (TARGET_ILP32)                                            \
+  if (CASE_VECTOR_MODE == SImode)                              \
     fprintf (STREAM, "\tdata4 @pcrel(.L%d)\n", VALUE);         \
   else                                                         \
     fprintf (STREAM, "\tdata8 @pcrel(.L%d)\n", VALUE);         \
   } while (0)
 
-/* Jump tables only need 8 byte alignment.  */
+/* Jump tables only need 4 or 8 byte alignment.  */
 
-#define ADDR_VEC_ALIGN(ADDR_VEC) 3
+#define ADDR_VEC_ALIGN(ADDR_VEC) (CASE_VECTOR_MODE == SImode ? 2 : 3)
 
 \f
 /* Assembler Commands for Exception Regions.  */
index 129cec8..349da7b 100644 (file)
   [(set_attr "itanium_class" "br")])
 
 (define_expand "tablejump"
-  [(parallel [(set (pc) (match_operand:DI 0 "memory_operand" ""))
+  [(parallel [(set (pc) (match_operand 0 "memory_operand" ""))
              (use (label_ref (match_operand 1 "" "")))])]
   ""
 {
      from the entry to the label.  Thus to convert to an absolute address
      we add the address of the memory from which the value is loaded.  */
   operands[0] = expand_simple_binop (DImode, PLUS, op0, addr,
-                                    NULL_RTX, 1, OPTAB_DIRECT);
+                                    NULL_RTX, 0, OPTAB_DIRECT);
 })
 
 (define_insn "*tablejump_internal"
index 3e0c653..11f0176 100644 (file)
@@ -146,6 +146,10 @@ STATIC func_ptr __CTOR_LIST__[1]                                             \
 #undef TARGET_PROMOTE_FUNCTION_MODE
 #define TARGET_PROMOTE_FUNCTION_MODE default_promote_function_mode_always_promote
 
+/* Code is always in P0/P1 (lower 32 bit addresses) on VMS.  */
+#undef CASE_VECTOR_MODE
+#define CASE_VECTOR_MODE SImode
+
 /* IA64 VMS doesn't fully support COMDAT sections.  */
 
 #define SUPPORTS_ONE_ONLY 0