drm/i915/guc: Update uncore access path in flush_ggtt_writes
authorMatthew Brost <matthew.brost@intel.com>
Sat, 7 Dec 2019 01:00:33 +0000 (17:00 -0800)
committerChris Wilson <chris@chris-wilson.co.uk>
Sat, 7 Dec 2019 16:56:13 +0000 (16:56 +0000)
The preferred way to access the uncore is through the GT structure.
Update the GuC function, flush_ggtt_writes, to use this path.

Signed-off-by: Matthew Brost <matthew.brost@intel.com>
Signed-off-by: John Harrison <john.c.harrison@intel.com>
Reviewed-by: Chris Wilson <chris@chris-wilson.co.uk>
Signed-off-by: Chris Wilson <chris@chris-wilson.co.uk>
Link: https://patchwork.freedesktop.org/patch/msgid/20191207010033.24667-1-John.C.Harrison@Intel.com
drivers/gpu/drm/i915/gt/uc/intel_guc_submission.c

index 6f94af7..4df296a 100644 (file)
@@ -488,10 +488,9 @@ static void guc_add_request(struct intel_guc *guc, struct i915_request *rq)
  */
 static void flush_ggtt_writes(struct i915_vma *vma)
 {
-       struct drm_i915_private *i915 = vma->vm->i915;
-
        if (i915_vma_is_map_and_fenceable(vma))
-               intel_uncore_posting_read_fw(&i915->uncore, GUC_STATUS);
+               intel_uncore_posting_read_fw(vma->vm->gt->uncore,
+                                            GUC_STATUS);
 }
 
 static void guc_submit(struct intel_engine_cs *engine,