freedreno/regs: Fix CP_DRAW_INDX_OFFSET command
authorKristian H. Kristensen <hoegsberg@google.com>
Wed, 18 Sep 2019 20:08:55 +0000 (13:08 -0700)
committerKristian H. Kristensen <hoegsberg@google.com>
Wed, 18 Sep 2019 23:59:10 +0000 (16:59 -0700)
On A5xx+ the INDX_BASE pointer is 64 bit.

Reviewed-by: Eric Anholt <eric@anholt.net>
src/freedreno/registers/adreno_pm4.xml

index efadcd9..aba316c 100644 (file)
@@ -651,9 +651,23 @@ opcode: CP_LOAD_STATE4 (30) (4 dwords)
        </reg32>
        <reg32 offset="3" name="3">
        </reg32>
+
+       <stripe variants="A5XX-">
+               <reg32 offset="4" name="4">
+                       <bitfield name="INDX_BASE_LO" low="0" high="31"/>
+               </reg32>
+               <reg32 offset="5" name="5">
+                       <bitfield name="INDX_BASE_HI" low="0" high="31"/>
+               </reg32>
+               <reg32 offset="6" name="6">
+                       <bitfield name="INDX_SIZE" low="0" high="31"/>
+               </reg32>
+       </stripe>
+
        <reg32 offset="4" name="4">
                <bitfield name="INDX_BASE" low="0" high="31"/>
        </reg32>
+
        <reg32 offset="5" name="5">
                <bitfield name="INDX_SIZE" low="0" high="31"/>
        </reg32>