powerpc/32: Use stmw/lmw for registers save/restore in asm

arch/powerpc/Makefile activates -mmultiple on BE PPC32 configs
in order to use multiple word instructions in functions entry/exit.

The patch does the same for the asm parts, for consistency.

On processors like the 8xx on which insn fetching is pretty slow,
this speeds up registers save/restore.

Signed-off-by: Christophe Leroy <christophe.leroy@c-s.fr>
[mpe: PPC32 is BE only, so drop the endian checks]
Signed-off-by: Michael Ellerman <mpe@ellerman.id.au>

diff --git a/arch/powerpc/include/asm/ppc_asm.h b/arch/powerpc/include/asm/ppc_asm.h
index 13f7f4c..75ece56 100644 (file)
--- a/arch/powerpc/include/asm/ppc_asm.h
+++ b/arch/powerpc/include/asm/ppc_asm.h
@@ -80,10 +80,8 @@ END_FW_FTR_SECTION_IFSET(FW_FEATURE_SPLPAR)
 #else
 #define SAVE_GPR(n, base)      stw     n,GPR0+4*(n)(base)
 #define REST_GPR(n, base)      lwz     n,GPR0+4*(n)(base)
-#define SAVE_NVGPRS(base)      SAVE_GPR(13, base); SAVE_8GPRS(14, base); \
-                               SAVE_10GPRS(22, base)
-#define REST_NVGPRS(base)      REST_GPR(13, base); REST_8GPRS(14, base); \
-                               REST_10GPRS(22, base)
+#define SAVE_NVGPRS(base)      stmw    13, GPR0+4*13(base)
+#define REST_NVGPRS(base)      lmw     13, GPR0+4*13(base)
 #endif
 
 #define SAVE_2GPRS(n, base)    SAVE_GPR(n, base); SAVE_GPR(n+1, base)

diff --git a/arch/powerpc/kernel/misc.S b/arch/powerpc/kernel/misc.S
index c60b70d..2f18fc1 100644 (file)
--- a/arch/powerpc/kernel/misc.S
+++ b/arch/powerpc/kernel/misc.S
@@ -60,6 +60,10 @@ _GLOBAL(setjmp)
        PPC_STL r0,0(r3)
        PPC_STL r1,SZL(r3)
        PPC_STL r2,2*SZL(r3)
+#ifdef CONFIG_PPC32
+       mfcr    r12
+       stmw    r12, 3*SZL(r3)
+#else
        mfcr    r0
        PPC_STL r0,3*SZL(r3)
        PPC_STL r13,4*SZL(r3)
@@ -81,10 +85,15 @@ _GLOBAL(setjmp)
        PPC_STL r29,20*SZL(r3)
        PPC_STL r30,21*SZL(r3)
        PPC_STL r31,22*SZL(r3)
+#endif
        li      r3,0
        blr
 
 _GLOBAL(longjmp)
+#ifdef CONFIG_PPC32
+       lmw     r12, 3*SZL(r3)
+       mtcrf   0x38, r12
+#else
        PPC_LL  r13,4*SZL(r3)
        PPC_LL  r14,5*SZL(r3)
        PPC_LL  r15,6*SZL(r3)
@@ -106,6 +115,7 @@ _GLOBAL(longjmp)
        PPC_LL  r31,22*SZL(r3)
        PPC_LL  r0,3*SZL(r3)
        mtcrf   0x38,r0
+#endif
        PPC_LL  r0,0(r3)
        PPC_LL  r1,SZL(r3)
        PPC_LL  r2,2*SZL(r3)

diff --git a/arch/powerpc/kernel/ppc_save_regs.S b/arch/powerpc/kernel/ppc_save_regs.S
index 1b1787d..8afbe21 100644 (file)
--- a/arch/powerpc/kernel/ppc_save_regs.S
+++ b/arch/powerpc/kernel/ppc_save_regs.S
@@ -25,6 +25,9 @@
  */
 _GLOBAL(ppc_save_regs)
        PPC_STL r0,0*SZL(r3)
+#ifdef CONFIG_PPC32
+       stmw    r2, 2*SZL(r3)
+#else
        PPC_STL r2,2*SZL(r3)
        PPC_STL r3,3*SZL(r3)
        PPC_STL r4,4*SZL(r3)
@@ -55,6 +58,7 @@ _GLOBAL(ppc_save_regs)
        PPC_STL r29,29*SZL(r3)
        PPC_STL r30,30*SZL(r3)
        PPC_STL r31,31*SZL(r3)
+#endif
        /* go up one stack frame for SP */
        PPC_LL  r4,0(r1)
        PPC_STL r4,1*SZL(r3)