arm64: dts: renesas: draak: Add RPC HyperFlash device node
authorGeert Uytterhoeven <geert+renesas@glider.be>
Tue, 29 Mar 2022 12:20:02 +0000 (14:20 +0200)
committerGeert Uytterhoeven <geert+renesas@glider.be>
Wed, 13 Apr 2022 11:53:42 +0000 (13:53 +0200)
Add the RPC HyperFlash device node along with its partitions to the
common Draak board DTS file.

Signed-off-by: Geert Uytterhoeven <geert+renesas@glider.be>
Link: https://lore.kernel.org/r/0f3d3018ecfcdce1bce67708708a6d3a98368b10.1648548339.git.geert+renesas@glider.be
arch/arm64/boot/dts/renesas/draak.dtsi

index eb0327c..2a784ee 100644 (file)
                function = "pwm1";
        };
 
+       rpc_pins: rpc {
+               groups = "rpc_clk2", "rpc_ctrl", "rpc_data", "rpc_reset",
+                        "rpc_int";
+               function = "rpc";
+       };
+
        scif2_pins: scif2 {
                groups = "scif2_data";
                function = "scif2";
        };
 };
 
+&rpc {
+       pinctrl-0 = <&rpc_pins>;
+       pinctrl-names = "default";
+
+       /* Left disabled.  To be enabled by firmware when unlocked. */
+
+       flash@0 {
+               compatible = "cypress,hyperflash", "cfi-flash";
+               reg = <0>;
+
+               partitions {
+                       compatible = "fixed-partitions";
+                       #address-cells = <1>;
+                       #size-cells = <1>;
+
+                       bootparam@0 {
+                               reg = <0x00000000 0x040000>;
+                               read-only;
+                       };
+                       bl2@40000 {
+                               reg = <0x00040000 0x140000>;
+                               read-only;
+                       };
+                       cert_header_sa6@180000 {
+                               reg = <0x00180000 0x040000>;
+                               read-only;
+                       };
+                       bl31@1c0000 {
+                               reg = <0x001c0000 0x040000>;
+                               read-only;
+                       };
+                       tee@200000 {
+                               reg = <0x00200000 0x440000>;
+                               read-only;
+                       };
+                       uboot@640000 {
+                               reg = <0x00640000 0x100000>;
+                               read-only;
+                       };
+                       dtb@740000 {
+                               reg = <0x00740000 0x080000>;
+                       };
+                       kernel@7c0000 {
+                               reg = <0x007c0000 0x1400000>;
+                       };
+                       user@1bc0000 {
+                               reg = <0x01bc0000 0x2440000>;
+                       };
+               };
+       };
+};
+
 &rwdt {
        timeout-sec = <60>;
        status = "okay";